JPS5111534A - - Google Patents

Info

Publication number
JPS5111534A
JPS5111534A JP49082297A JP8229774A JPS5111534A JP S5111534 A JPS5111534 A JP S5111534A JP 49082297 A JP49082297 A JP 49082297A JP 8229774 A JP8229774 A JP 8229774A JP S5111534 A JPS5111534 A JP S5111534A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP49082297A
Other languages
Japanese (ja)
Inventor
Nobutoshi Nakayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP49082297A priority Critical patent/JPS5111534A/ja
Publication of JPS5111534A publication Critical patent/JPS5111534A/ja
Pending legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Memory System (AREA)
JP49082297A 1974-07-19 1974-07-19 Pending JPS5111534A (cs)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49082297A JPS5111534A (cs) 1974-07-19 1974-07-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49082297A JPS5111534A (cs) 1974-07-19 1974-07-19

Publications (1)

Publication Number Publication Date
JPS5111534A true JPS5111534A (cs) 1976-01-29

Family

ID=13770600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49082297A Pending JPS5111534A (cs) 1974-07-19 1974-07-19

Country Status (1)

Country Link
JP (1) JPS5111534A (cs)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS537145A (en) * 1976-07-09 1978-01-23 Hitachi Ltd Line memory control system at communication control equipment
WO1982003930A1 (en) * 1981-04-30 1982-11-11 Kurakake Mitsuo Data exchanging method and device
JPS5953959A (ja) * 1982-09-20 1984-03-28 Nec Corp 共有メモリ装置
JPS6068462A (ja) * 1983-09-24 1985-04-19 Yaskawa Electric Mfg Co Ltd マルチプロセッサ・システム
JPS6132160A (ja) * 1984-07-23 1986-02-14 Fujitsu Ltd アクセスプライオリティ制御方式
WO2020230412A1 (ja) * 2019-05-16 2020-11-19 オムロン株式会社 情報処理装置

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS537145A (en) * 1976-07-09 1978-01-23 Hitachi Ltd Line memory control system at communication control equipment
WO1982003930A1 (en) * 1981-04-30 1982-11-11 Kurakake Mitsuo Data exchanging method and device
JPS5953959A (ja) * 1982-09-20 1984-03-28 Nec Corp 共有メモリ装置
JPS6068462A (ja) * 1983-09-24 1985-04-19 Yaskawa Electric Mfg Co Ltd マルチプロセッサ・システム
JPS6132160A (ja) * 1984-07-23 1986-02-14 Fujitsu Ltd アクセスプライオリティ制御方式
WO2020230412A1 (ja) * 2019-05-16 2020-11-19 オムロン株式会社 情報処理装置
JP2020187658A (ja) * 2019-05-16 2020-11-19 オムロン株式会社 情報処理装置
US11782860B2 (en) 2019-05-16 2023-10-10 Omron Corporation Information processing device for preventing occurrence of memory contention

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