JPH0519981B2 - - Google Patents

Info

Publication number
JPH0519981B2
JPH0519981B2 JP61264282A JP26428286A JPH0519981B2 JP H0519981 B2 JPH0519981 B2 JP H0519981B2 JP 61264282 A JP61264282 A JP 61264282A JP 26428286 A JP26428286 A JP 26428286A JP H0519981 B2 JPH0519981 B2 JP H0519981B2
Authority
JP
Japan
Prior art keywords
cell array
memory device
bonding
semiconductor memory
dip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61264282A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63117439A (ja
Inventor
Hitonori Hayano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP61264282A priority Critical patent/JPS63117439A/ja
Publication of JPS63117439A publication Critical patent/JPS63117439A/ja
Publication of JPH0519981B2 publication Critical patent/JPH0519981B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Memories (AREA)
JP61264282A 1986-11-05 1986-11-05 半導体記憶装置 Granted JPS63117439A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61264282A JPS63117439A (ja) 1986-11-05 1986-11-05 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61264282A JPS63117439A (ja) 1986-11-05 1986-11-05 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS63117439A JPS63117439A (ja) 1988-05-21
JPH0519981B2 true JPH0519981B2 (enrdf_load_stackoverflow) 1993-03-18

Family

ID=17401001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61264282A Granted JPS63117439A (ja) 1986-11-05 1986-11-05 半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS63117439A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585738B2 (ja) * 1988-08-12 1997-02-26 株式会社日立製作所 半導体記憶装置

Also Published As

Publication number Publication date
JPS63117439A (ja) 1988-05-21

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