JPH0467781B2 - - Google Patents

Info

Publication number
JPH0467781B2
JPH0467781B2 JP61238388A JP23838886A JPH0467781B2 JP H0467781 B2 JPH0467781 B2 JP H0467781B2 JP 61238388 A JP61238388 A JP 61238388A JP 23838886 A JP23838886 A JP 23838886A JP H0467781 B2 JPH0467781 B2 JP H0467781B2
Authority
JP
Japan
Prior art keywords
impurity
oxide film
silicon substrate
silicon
silicon oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61238388A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6393153A (ja
Inventor
Yutaka Etsuno
Yoshiaki Baba
Jiro Ooshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP61238388A priority Critical patent/JPS6393153A/ja
Priority to US07/101,026 priority patent/US4780426A/en
Priority to DE8787114619T priority patent/DE3783418T2/de
Priority to EP87114619A priority patent/EP0263504B1/en
Publication of JPS6393153A publication Critical patent/JPS6393153A/ja
Publication of JPH0467781B2 publication Critical patent/JPH0467781B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/061—Manufacture or treatment of lateral BJTs 
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
JP61238388A 1986-10-07 1986-10-07 半導体装置の製造方法 Granted JPS6393153A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP61238388A JPS6393153A (ja) 1986-10-07 1986-10-07 半導体装置の製造方法
US07/101,026 US4780426A (en) 1986-10-07 1987-09-24 Method for manufacturing high-breakdown voltage semiconductor device
DE8787114619T DE3783418T2 (de) 1986-10-07 1987-10-07 Verfahren zur herstellung einer halbleiterschaltung mit hoher durchbruchspannung.
EP87114619A EP0263504B1 (en) 1986-10-07 1987-10-07 Method for manufacturing high-breakdown voltage semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61238388A JPS6393153A (ja) 1986-10-07 1986-10-07 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6393153A JPS6393153A (ja) 1988-04-23
JPH0467781B2 true JPH0467781B2 (en, 2012) 1992-10-29

Family

ID=17029453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61238388A Granted JPS6393153A (ja) 1986-10-07 1986-10-07 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US4780426A (en, 2012)
EP (1) EP0263504B1 (en, 2012)
JP (1) JPS6393153A (en, 2012)
DE (1) DE3783418T2 (en, 2012)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0529329A (ja) * 1991-07-24 1993-02-05 Canon Inc 半導体装置の製造方法
JP2748898B2 (ja) * 1995-08-31 1998-05-13 日本電気株式会社 半導体装置およびその製造方法
US6117719A (en) * 1997-12-18 2000-09-12 Advanced Micro Devices, Inc. Oxide spacers as solid sources for gallium dopant introduction
US6806197B2 (en) * 2001-08-07 2004-10-19 Micron Technology, Inc. Method of forming integrated circuitry, and method of forming a contact opening
US8106487B2 (en) 2008-12-23 2012-01-31 Pratt & Whitney Rocketdyne, Inc. Semiconductor device having an inorganic coating layer applied over a junction termination extension
JP5452062B2 (ja) * 2009-04-08 2014-03-26 三菱電機株式会社 炭化珪素半導体装置の製造方法
JP5223773B2 (ja) * 2009-05-14 2013-06-26 三菱電機株式会社 炭化珪素半導体装置の製造方法
CN105493293B (zh) * 2013-09-09 2018-08-24 株式会社日立制作所 半导体装置及其制造方法
CN113178385B (zh) * 2021-03-31 2022-12-23 青岛惠科微电子有限公司 一种芯片的制造方法、制造设备和芯片
CN113990767A (zh) * 2021-10-28 2022-01-28 西安微电子技术研究所 一种电压法测试扩散结深的方法
CN115472697A (zh) * 2022-08-30 2022-12-13 西安电子科技大学杭州研究院 一种具有优化掺杂分布的氧化镓mosfet器件

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3834953A (en) * 1970-02-07 1974-09-10 Tokyo Shibaura Electric Co Semiconductor devices containing as impurities as and p or b and the method of manufacturing the same
FR2154294B1 (en, 2012) * 1971-09-27 1974-01-04 Silec Semi Conducteurs
JPS5538823B2 (en, 2012) * 1971-12-22 1980-10-07
US4060427A (en) * 1976-04-05 1977-11-29 Ibm Corporation Method of forming an integrated circuit region through the combination of ion implantation and diffusion steps
GB1548520A (en) * 1976-08-27 1979-07-18 Tokyo Shibaura Electric Co Method of manufacturing a semiconductor device
JPS5388579A (en) * 1977-01-13 1978-08-04 Nec Corp Production of semiconductor device
JPS5795625A (en) * 1980-12-04 1982-06-14 Toshiba Corp Manufacture of semiconductor device
JPS57124427A (en) * 1981-01-26 1982-08-03 Toshiba Corp Manufacture of semiconductor device
JPS5831519A (ja) * 1981-08-18 1983-02-24 Toshiba Corp 半導体装置の製造方法
DE3219888A1 (de) * 1982-05-27 1983-12-01 Deutsche Itt Industries Gmbh, 7800 Freiburg Planares halbleiterbauelement und verfahren zur herstellung
JPS59210666A (ja) * 1983-05-16 1984-11-29 Nec Corp 半導体装置
JPS60117765A (ja) * 1983-11-30 1985-06-25 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
EP0263504B1 (en) 1993-01-07
DE3783418D1 (de) 1993-02-18
JPS6393153A (ja) 1988-04-23
US4780426A (en) 1988-10-25
DE3783418T2 (de) 1993-05-27
EP0263504A3 (en) 1989-10-18
EP0263504A2 (en) 1988-04-13

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees