JPH0464250A - エキスパンドテープ及びチップ部品の実装方法 - Google Patents

エキスパンドテープ及びチップ部品の実装方法

Info

Publication number
JPH0464250A
JPH0464250A JP2176848A JP17684890A JPH0464250A JP H0464250 A JPH0464250 A JP H0464250A JP 2176848 A JP2176848 A JP 2176848A JP 17684890 A JP17684890 A JP 17684890A JP H0464250 A JPH0464250 A JP H0464250A
Authority
JP
Japan
Prior art keywords
preform
chip
tape
chips
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2176848A
Other languages
English (en)
Other versions
JP2866453B2 (ja
Inventor
Kazutaka Shibata
和孝 柴田
Yutaka Murakami
豊 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2176848A priority Critical patent/JP2866453B2/ja
Priority to US07/816,398 priority patent/US5316853A/en
Publication of JPH0464250A publication Critical patent/JPH0464250A/ja
Application granted granted Critical
Publication of JP2866453B2 publication Critical patent/JP2866453B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83805—Soldering or alloying involving forming a eutectic alloy at the bonding interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01032—Germanium [Ge]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01067—Holmium [Ho]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/913—Material designed to be responsive to temperature, light, moisture
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31511—Of epoxy ether
    • Y10T428/31515—As intermediate layer
    • Y10T428/31522—Next to metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31511—Of epoxy ether
    • Y10T428/31529—Next to metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31721—Of polyimide

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dicing (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 （イ）産業上の利用分野 この発明は、半導体ウェハのダイシング時に用いられる
エキスバンドテープに関する。
（ロ）従来の技術 従来、半導体ウェハのダイシング時には、エキスバンド
テープが使用される。このエキスバンドテープは、展伸
性を有する合成樹脂フィルムよりなり、第３図（ａ）に
示すように、その表面１１ａにウェハ１４をはりつける
。この状態で、ウェハ１４をダイシングし〔第３図（ｂ
）参照〕、エキスバンドテープ１１を引き伸ばすと、ウ
ェハ１４がチップ１５、・・・　１５に分離する〔第３
図（Ｃ）参照〕。
これらチップ１５は、次のグイボンディング工程で、プ
リフォーム材（例えば銀やはんだのペースト）を用いて
、リードフレーム等にグイボンディングされる。
（ハ）発明が解決しようとする課題 上記従来のエキスバンドテープを用いるダイシング工程
は、グイボンディング工程とは別個のものであり、工程
数が多くなり、それだけ人員も必要となる問題があった
。一方、エキスバンドテープとは別にプリフォーム材を
管理する手間が必要である問題点もあった。
この発明は、上記に鑑みなされたもので、工程を簡略化
し、また材料管理の手間が省けるエキスバンドテープの
提供を目的としている。
（ニ）課題を解決するための手段攻ひ゛イ乍用上記課題
を解決するため、この発明のエキスバンドテープは、展
伸性を有するフィルム上に、プリフォーム層を形成して
なるものであり、ウェハをはりつけダイシングを行った
後、チップをエキスパンドテープ上より取り上げた時、
チップ底面にプリフォーム材が付着した状態となってい
る。
従って、そのまま直ちにリードフレーム等にダイボンデ
ィングすることができ、工程の簡略化及び人員の削減を
図ることができる。また、プリフォーム材がエキスバン
ドテープと一体となっているから、材料管理の手間が省
ける。
（ホ）実施例 この発明の一実施例を第１図及び第２図を用いて以下に
説明する。
第１図は、実施例エキスバンドテープ１の断面を示して
いる。このエキスバンドテープ１は、展伸性を有する合
成樹脂フィルム２上に、プリフォーム層３を形成してな
るものである。プリフォーム層３は、例えば銀ペースト
やはんだペーストを塗布して形成される。
第２図（ａ）〜（ｄ）は、この実施例エキスバンドテー
プｌを用いたダイシング工程を順に示す図である。
まず、エキスバンドテープ１のプリフオーム層３上にウ
ェハ４がはりつけられる〔第２図（ａ）参照］。
次に、グイシングソウ（図示せず）を用いてウェハ４を
チップ５、・・・、５に切断する。この時ダイシング溝
６、・・・　６の深さは、フィルム２に達するようにし
て、プリフォーム層３も切断されるようにする〔第２図
（ｂ）参照］。
この状態でエキスバンドテープ１に引張力を加えて伸ば
すと、チップ５、・・・　５が分離する〔第２図（Ｃ）
参照〕。この時プリフォーム層３も、千ツブ５、・・・
　５と共に３ａ、・・・　３ａに分離する。
分離されたチップ５は、第２図（ｄ）に示すようにコレ
ット７で吸着しピックアンプする。この時チップ５底面
に、分割されたプリフォーム層３ａが付着している。こ
のため、直ちにチップ５をリードフレームなどにグイボ
ンディングすることができ、工程の簡略化を図ることが
できる。
（へ）発明の詳細 な説明したように、この発明のエキスバンドテープは、
展伸性を有するフィルム上に、プリフォーム層を形成し
てなるものであるから、工程の簡略化を図り人員を削減
できると共に、材料の管理の手間が省ける利点を有して
いる。
【図面の簡単な説明】
第１図は、この発明の一実施例に係るエキスバンドテー
プの要部断面図、第２図（ａ）、第２図（ト））、第２
図（Ｃ）及び第２図（ｄ）は、それぞれ順に同エキスバ
ンドテープを用いたダイシング工程を説明する図、第３
図（ａ）、第３図（ｂ）及び第３図（Ｃ）は、ツレぞれ
順に従来のエキスバンドテープを用いたダイシング工程
を説明する図である。 １：エキスバンドテープ、 ２：フィルム、　　　３ニブリフオ一ム層、４：ウェハ
、　　　　５：チップ。 第１図 特許出願人　　　　　　　ローム株式会社代理人　　　
弁理士　　　中　村　茂　信第２図（ｂ） 第 図 （Ｃ） 第 図 （ｄ） ａ ａ 第 図 （ａ） １．４１ 第 図 （ｂ） 第 図 （Ｃ）

Claims (1)

    【特許請求の範囲】
  1. （１）展伸性を有するフィルム上に、プリフォーム層を
    形成してなるエキスパンドテープ。
JP2176848A 1990-07-04 1990-07-04 エキスパンドテープ及びチップ部品の実装方法 Expired - Fee Related JP2866453B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2176848A JP2866453B2 (ja) 1990-07-04 1990-07-04 エキスパンドテープ及びチップ部品の実装方法
US07/816,398 US5316853A (en) 1990-07-04 1991-12-27 Expand tape

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2176848A JP2866453B2 (ja) 1990-07-04 1990-07-04 エキスパンドテープ及びチップ部品の実装方法
US07/816,398 US5316853A (en) 1990-07-04 1991-12-27 Expand tape

Publications (2)

Publication Number Publication Date
JPH0464250A true JPH0464250A (ja) 1992-02-28
JP2866453B2 JP2866453B2 (ja) 1999-03-08

Family

ID=26497614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2176848A Expired - Fee Related JP2866453B2 (ja) 1990-07-04 1990-07-04 エキスパンドテープ及びチップ部品の実装方法

Country Status (2)

Country Link
US (1) US5316853A (ja)
JP (1) JP2866453B2 (ja)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5962815A (en) 1995-01-18 1999-10-05 Prolinx Labs Corporation Antifuse interconnect between two conducting layers of a printed circuit board
US6007920A (en) * 1996-01-22 1999-12-28 Texas Instruments Japan, Ltd. Wafer dicing/bonding sheet and process for producing semiconductor device
MY118036A (en) * 1996-01-22 2004-08-30 Lintec Corp Wafer dicing/bonding sheet and process for producing semiconductor device
JP3955659B2 (ja) 1997-06-12 2007-08-08 リンテック株式会社 電子部品のダイボンディング方法およびそれに使用されるダイボンディング装置
US6383606B2 (en) 1999-02-02 2002-05-07 Michelle Broyles Semiconductor wafer diaphragm
JP2004273895A (ja) * 2003-03-11 2004-09-30 Disco Abrasive Syst Ltd 半導体ウエーハの分割方法
JP3933118B2 (ja) * 2003-10-02 2007-06-20 ソニー株式会社 半導体装置の製造方法および半導体装置の製造装置
US7015064B1 (en) 2004-04-23 2006-03-21 National Semiconductor Corporation Marking wafers using pigmentation in a mounting tape
US7135385B1 (en) 2004-04-23 2006-11-14 National Semiconductor Corporation Semiconductor devices having a back surface protective coating
US7101620B1 (en) 2004-09-07 2006-09-05 National Semiconductor Corporation Thermal release wafer mount tape with B-stage adhesive
US7750196B2 (en) * 2006-06-08 2010-07-06 Chevron U.S.A. Inc. Oxygenate conversion using molecular sieve SSZ-75
US8030138B1 (en) 2006-07-10 2011-10-04 National Semiconductor Corporation Methods and systems of packaging integrated circuits
JP2008235398A (ja) * 2007-03-19 2008-10-02 Disco Abrasive Syst Ltd デバイスの製造方法
KR100828025B1 (ko) * 2007-06-13 2008-05-08 삼성전자주식회사 웨이퍼 절단 방법
US7749809B2 (en) * 2007-12-17 2010-07-06 National Semiconductor Corporation Methods and systems for packaging integrated circuits
US8048781B2 (en) * 2008-01-24 2011-11-01 National Semiconductor Corporation Methods and systems for packaging integrated circuits
US8828804B2 (en) * 2008-04-30 2014-09-09 Infineon Technologies Ag Semiconductor device and method
US20100015329A1 (en) * 2008-07-16 2010-01-21 National Semiconductor Corporation Methods and systems for packaging integrated circuits with thin metal contacts
US10395954B2 (en) * 2014-11-05 2019-08-27 Ev Group E. Thallner Gmbh Method and device for coating a product substrate

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5029280A (ja) * 1973-07-20 1975-03-25
JPH02238641A (ja) * 1989-03-13 1990-09-20 Fujitsu Ltd 半導体装置の製造方法
JPH0458546A (ja) * 1990-06-28 1992-02-25 Nec Corp 半導体ウェーハの切断方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4626474A (en) * 1985-06-21 1986-12-02 Stauffer Chemical Company Polyimide film/metal foil lamination
US4780371A (en) * 1986-02-24 1988-10-25 International Business Machines Corporation Electrically conductive composition and use thereof
US4847136A (en) * 1988-03-21 1989-07-11 Hughes Aircraft Company Thermal expansion mismatch forgivable printed wiring board for ceramic leadless chip carrier
US5043102A (en) * 1989-11-29 1991-08-27 Advanced Products, Inc. Conductive adhesive useful for bonding a semiconductor die to a conductive support base

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5029280A (ja) * 1973-07-20 1975-03-25
JPH02238641A (ja) * 1989-03-13 1990-09-20 Fujitsu Ltd 半導体装置の製造方法
JPH0458546A (ja) * 1990-06-28 1992-02-25 Nec Corp 半導体ウェーハの切断方法

Also Published As

Publication number Publication date
US5316853A (en) 1994-05-31
JP2866453B2 (ja) 1999-03-08

Similar Documents

Publication Publication Date Title
JPH0464250A (ja) エキスパンドテープ及びチップ部品の実装方法
US5863813A (en) Method of processing semiconductive material wafers and method of forming flip chips and semiconductor chips
US5762744A (en) Method of producing a semiconductor device using an expand tape
MY120043A (en) Method of die bonding electronic component and die bonding apparatus therefor
MY125340A (en) Process for producing semiconductor device
EP1326266A3 (en) Protective tape applying and separating method
JP2000182995A (ja) 半導体装置の製造方法
JP2521459B2 (ja) 半導体チツプの製造方法
JPS624341A (ja) 半導体装置の製造方法
JP3325646B2 (ja) 半導体ウエハの裏面研削方法および保護テープ貼付機
JP2005045149A (ja) エキスパンド方法
JPH0387027A (ja) 半導体素子の製造方法
JPH04367250A (ja) 半導体チップの製造方法
JP2860671B2 (ja) 半導体ウエハのダイシング方法
JPH09283469A (ja) 半導体装置の製造方法
JPH05198671A (ja) 半導体ウェハーのダイシング方法
JP2665062B2 (ja) 半導体装置の製造方法
JPH06104297A (ja) 半導体装置の製造方法
JPH0469949A (ja) ワークの分割方法
JPH09213661A (ja) 半導体装置の製造方法
EP1341232A3 (en) Semiconductor device and method for fabricating the same
JPS5851521A (ja) 半導体ウェハのダイシング方法
JPH06823Y2 (ja) 半導体ウエハの補強用当板
JPH04252049A (ja) ウエハ貼付け方法
JPS59188940A (ja) 粘着シ−ト

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees