JPH0459712B2 - - Google Patents

Info

Publication number
JPH0459712B2
JPH0459712B2 JP58004162A JP416283A JPH0459712B2 JP H0459712 B2 JPH0459712 B2 JP H0459712B2 JP 58004162 A JP58004162 A JP 58004162A JP 416283 A JP416283 A JP 416283A JP H0459712 B2 JPH0459712 B2 JP H0459712B2
Authority
JP
Japan
Prior art keywords
selection means
data line
lines
semiconductor memory
switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58004162A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59129983A (ja
Inventor
Kyoo Ito
Ryoichi Hori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58004162A priority Critical patent/JPS59129983A/ja
Priority to EP83107070A priority patent/EP0101884A3/en
Priority to KR1019830003347A priority patent/KR910002962B1/ko
Priority to US06/515,519 priority patent/US4590588A/en
Publication of JPS59129983A publication Critical patent/JPS59129983A/ja
Publication of JPH0459712B2 publication Critical patent/JPH0459712B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay

Landscapes

  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
JP58004162A 1982-07-21 1983-01-17 半導体メモリ装置 Granted JPS59129983A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP58004162A JPS59129983A (ja) 1983-01-17 1983-01-17 半導体メモリ装置
EP83107070A EP0101884A3 (en) 1982-07-21 1983-07-19 Monolithic semiconductor memory
KR1019830003347A KR910002962B1 (ko) 1982-07-21 1983-07-20 데이터선의 저항을 저감하는 모노리식 반도체 메모리
US06/515,519 US4590588A (en) 1982-07-21 1983-07-20 Monolithic semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58004162A JPS59129983A (ja) 1983-01-17 1983-01-17 半導体メモリ装置

Publications (2)

Publication Number Publication Date
JPS59129983A JPS59129983A (ja) 1984-07-26
JPH0459712B2 true JPH0459712B2 (enrdf_load_stackoverflow) 1992-09-24

Family

ID=11577041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58004162A Granted JPS59129983A (ja) 1982-07-21 1983-01-17 半導体メモリ装置

Country Status (1)

Country Link
JP (1) JPS59129983A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6299989A (ja) * 1985-10-25 1987-05-09 Hitachi Ltd 半導体メモリ
JPH02246090A (ja) * 1989-03-17 1990-10-01 Fujitsu Ltd 半導体記憶装置
JP3060458B2 (ja) * 1989-03-17 2000-07-10 富士通株式会社 半導体記憶装置
DE69028625T2 (de) * 1990-06-12 1997-01-30 Fujitsu Ltd Dynamische Speichereinrichtung mit wahlfreiem Zugriff
JPH09161476A (ja) 1995-10-04 1997-06-20 Toshiba Corp 半導体メモリ及びそのテスト回路、並びにデ−タ転送システム
WO1997023876A1 (fr) * 1995-12-25 1997-07-03 Hitachi, Ltd. Dispositif a memoire remanente

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53101788A (en) * 1977-02-17 1978-09-05 Fukuoka Kiki Seisakushiyo Kk Cutting machine
JPS5951075B2 (ja) * 1980-03-31 1984-12-12 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
JPS59129983A (ja) 1984-07-26

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