JPH0454993B2 - - Google Patents

Info

Publication number
JPH0454993B2
JPH0454993B2 JP58034174A JP3417483A JPH0454993B2 JP H0454993 B2 JPH0454993 B2 JP H0454993B2 JP 58034174 A JP58034174 A JP 58034174A JP 3417483 A JP3417483 A JP 3417483A JP H0454993 B2 JPH0454993 B2 JP H0454993B2
Authority
JP
Japan
Prior art keywords
film
silicon film
silicon
sapphire substrate
sos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58034174A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59159563A (ja
Inventor
Takao Oota
Junichi Oono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58034174A priority Critical patent/JPS59159563A/ja
Priority to US06/583,833 priority patent/US4523963A/en
Publication of JPS59159563A publication Critical patent/JPS59159563A/ja
Publication of JPH0454993B2 publication Critical patent/JPH0454993B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6706—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing leakage current 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H10D30/6759—Silicon-on-sapphire [SOS] substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2921—Materials being crystalline insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
    • H10P14/3211—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3822—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H10P30/212—Through-implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1908—Preparing SOI wafers using silicon implanted buried insulating layers, e.g. oxide layers [SIMOX]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
JP58034174A 1983-03-02 1983-03-02 半導体装置の製造方法 Granted JPS59159563A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58034174A JPS59159563A (ja) 1983-03-02 1983-03-02 半導体装置の製造方法
US06/583,833 US4523963A (en) 1983-03-02 1984-02-27 Method of fabricating MOS device on a SOS wafer by stabilizing interface region with silicon and oxygen implant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58034174A JPS59159563A (ja) 1983-03-02 1983-03-02 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59159563A JPS59159563A (ja) 1984-09-10
JPH0454993B2 true JPH0454993B2 (2) 1992-09-01

Family

ID=12406837

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58034174A Granted JPS59159563A (ja) 1983-03-02 1983-03-02 半導体装置の製造方法

Country Status (2)

Country Link
US (1) US4523963A (2)
JP (1) JPS59159563A (2)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4659392A (en) * 1985-03-21 1987-04-21 Hughes Aircraft Company Selective area double epitaxial process for fabricating silicon-on-insulator structures for use with MOS devices and integrated circuits
EP0199497B1 (en) * 1985-04-10 1992-01-02 Fujitsu Limited Process for fabricating a self-aligned bipolar transistor
US4751554A (en) * 1985-09-27 1988-06-14 Rca Corporation Silicon-on-sapphire integrated circuit and method of making the same
US4758529A (en) * 1985-10-31 1988-07-19 Rca Corporation Method of forming an improved gate dielectric for a MOSFET on an insulating substrate
US4870475A (en) * 1985-11-01 1989-09-26 Nec Corporation Semiconductor device and method of manufacturing the same
US4735917A (en) * 1986-04-28 1988-04-05 General Electric Company Silicon-on-sapphire integrated circuits
US4722912A (en) * 1986-04-28 1988-02-02 Rca Corporation Method of forming a semiconductor structure
US4755481A (en) * 1986-05-15 1988-07-05 General Electric Company Method of making a silicon-on-insulator transistor
JPH07120702B2 (ja) * 1986-06-12 1995-12-20 松下電器産業株式会社 半導体装置の製造方法
US4903094A (en) * 1986-08-26 1990-02-20 General Electric Company Memory cell structure having radiation hardness
US4989061A (en) * 1986-09-05 1991-01-29 General Electric Company Radiation hard memory cell structure with drain shielding
US4766482A (en) * 1986-12-09 1988-08-23 General Electric Company Semiconductor device and method of making the same
US4753895A (en) * 1987-02-24 1988-06-28 Hughes Aircraft Company Method of forming low leakage CMOS device on insulating substrate
JPH0637317A (ja) * 1990-04-11 1994-02-10 General Motors Corp <Gm> 薄膜トランジスタおよびその製造方法
KR920010963A (ko) * 1990-11-23 1992-06-27 오가 노리오 Soi형 종채널 fet 및 그 제조방법
US5145802A (en) * 1991-11-12 1992-09-08 United Technologies Corporation Method of making SOI circuit with buried connectors
US5323047A (en) * 1992-01-31 1994-06-21 Sgs-Thomson Microelectronics, Inc. Structure formed by a method of patterning a submicron semiconductor layer
DE69318202T2 (de) * 1992-02-20 1998-11-12 Matsushita Electronics Corp Festkörperbildaufnahme-Vorrichtung und Herstellungsverfahren
EP0566838A3 (en) * 1992-02-21 1996-07-31 Matsushita Electric Industrial Co Ltd Manufacturing method of thin film transistor
US5863823A (en) * 1993-07-12 1999-01-26 Peregrine Semiconductor Corporation Self-aligned edge control in silicon on insulator
US5416043A (en) * 1993-07-12 1995-05-16 Peregrine Semiconductor Corporation Minimum charge FET fabricated on an ultrathin silicon on sapphire wafer
US5572040A (en) * 1993-07-12 1996-11-05 Peregrine Semiconductor Corporation High-frequency wireless communication system on a single ultrathin silicon on sapphire chip
US5864162A (en) * 1993-07-12 1999-01-26 Peregrine Seimconductor Corporation Apparatus and method of making a self-aligned integrated resistor load on ultrathin silicon on sapphire
US5973382A (en) * 1993-07-12 1999-10-26 Peregrine Semiconductor Corporation Capacitor on ultrathin semiconductor on insulator
US5973363A (en) * 1993-07-12 1999-10-26 Peregrine Semiconductor Corp. CMOS circuitry with shortened P-channel length on ultrathin silicon on insulator
US5930638A (en) * 1993-07-12 1999-07-27 Peregrine Semiconductor Corp. Method of making a low parasitic resistor on ultrathin silicon on insulator
JPH0766424A (ja) * 1993-08-20 1995-03-10 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
TW264575B (2) * 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
JP3497627B2 (ja) * 1994-12-08 2004-02-16 株式会社東芝 半導体装置およびその製造方法
US6746905B1 (en) * 1996-06-20 2004-06-08 Kabushiki Kaisha Toshiba Thin film transistor and manufacturing process therefor
US5930642A (en) * 1997-06-09 1999-07-27 Advanced Micro Devices, Inc. Transistor with buried insulative layer beneath the channel region
US6022793A (en) 1997-10-21 2000-02-08 Seh America, Inc. Silicon and oxygen ion co-implantation for metallic gettering in epitaxial wafers
US6100172A (en) * 1998-10-29 2000-08-08 International Business Machines Corporation Method for forming a horizontal surface spacer and devices formed thereby
US6211095B1 (en) * 1998-12-23 2001-04-03 Agilent Technologies, Inc. Method for relieving lattice mismatch stress in semiconductor devices
JP2004152962A (ja) * 2002-10-30 2004-05-27 Oki Electric Ind Co Ltd 半導体装置の製造方法
JP2005203685A (ja) * 2004-01-19 2005-07-28 Oki Electric Ind Co Ltd 半導体装置，及び半導体装置の製造方法
JPWO2013105634A1 (ja) * 2012-01-12 2015-05-11 信越化学工業株式会社 熱酸化異種複合基板及びその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2344320C2 (de) * 1973-09-03 1975-06-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Kompensation von Grenzflächenladungen bei epitaktisch auf ein Substrat aufgewachsenen Siliziumdünnschichten
US4177084A (en) * 1978-06-09 1979-12-04 Hewlett-Packard Company Method for producing a low defect layer of silicon-on-sapphire wafer
US4178191A (en) * 1978-08-10 1979-12-11 Rca Corp. Process of making a planar MOS silicon-on-insulating substrate device
US4385937A (en) * 1980-05-20 1983-05-31 Tokyo Shibaura Denki Kabushiki Kaisha Regrowing selectively formed ion amorphosized regions by thermal gradient
JPS57126131A (en) * 1981-01-28 1982-08-05 Toshiba Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
US4523963A (en) 1985-06-18
JPS59159563A (ja) 1984-09-10

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