JPH04348540A - フリップチップボンダー - Google Patents

フリップチップボンダー

Info

Publication number
JPH04348540A
JPH04348540A JP3120847A JP12084791A JPH04348540A JP H04348540 A JPH04348540 A JP H04348540A JP 3120847 A JP3120847 A JP 3120847A JP 12084791 A JP12084791 A JP 12084791A JP H04348540 A JPH04348540 A JP H04348540A
Authority
JP
Japan
Prior art keywords
substrate
chip
adhesive
flexible substrate
stand
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3120847A
Other languages
English (en)
Inventor
Takeshi Hori
剛 堀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP3120847A priority Critical patent/JPH04348540A/ja
Priority to DE69207815T priority patent/DE69207815T2/de
Priority to EP92108857A priority patent/EP0517071B1/en
Priority to US07/887,844 priority patent/US5232532A/en
Priority to KR1019920008963A priority patent/KR920022433A/ko
Publication of JPH04348540A publication Critical patent/JPH04348540A/ja
Pending legal-status Critical Current

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    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】
【0001】
【産業上の利用分野】この発明は、IC等のチップ状電
子部品をフレキシブル基板に接続固定するフリップチッ
プボンダーに関する。
【0002】
【従来の技術】従来、プラスティックカードにICチッ
プを内蔵してなるICカードが提案されている。このI
Cカードを製造する際、基板の配線パターンにICチッ
プの電極を接続する必要がある。
【0003】図3は、接続方法としてワイヤ・ボンディ
ングを使用した例を示している。同図において、1はフ
レキシブル基板、2はフレキシブル基板1上に形成され
た配線パターンである。ICチップ3は接着剤4をもっ
てフレキシブル基板1に固着された後、ICチップ3の
電極3aと配線パターン2とが金ワイヤ5を使用して接
続される。
【0004】このようなワイヤ・ボンディングの接続方
法を使用するものによれば、金ワイヤ5が所定の空間を
占めるため全体的に厚くなってしまう不都合があった。 そこで、接続方法としてワイヤレス・ボンディングの1
つであるフリップチップボンディング(フェイスダウン
・ボンディング)を使用することが提案されている。
【0005】図4は、接続方法としてフリップチップ・
ボンディングを使用した例を示している。この図4にお
いて、図3と対応する部分には同一符号を付して示して
いる。
【0006】配線パターン2上にはICチップ3の電極
3aに対応した位置にバンプ6が接続される。まず、I
Cチップ3の載置位置に対応するフレキシブル基板1上
に熱硬化性を有する接着剤7が載せられる(図4Aに図
示)。
【0007】次に、電極3aがバンプ6に対応するよう
にICチップ3がフレキシブル基板1上に載置される。 そして、ICチップ3は接着剤7の熱硬化温度に合わせ
て加熱されると共に、ICチップ3の電極3aとバンプ
6間の接着剤7が除去されるに必要な圧力が掛けられる
。これにより、ICチップ3はフレキシブル基板1上に
固着されると共に、ICチップ3の電極3aはバンプ6
を介して配線パターン2に接続される(図4Bに図示)
【0008】
【発明が解決しようとする課題】このようなフリップチ
ップ・ボンディングにおいては、接着剤7が加熱される
際、接着剤7より気泡(ケミカルガスや空気)が発生し
、フレキシブル基板1とICチップ3との間に残留する
ことがあった。図5は気泡8の残留状態を示している。 図5Aは縦断面図であり、図5Bはフレキシブル基板1
を省略した底面図である。
【0009】このように気泡8が残留するときは、温度
変化に応じて気泡8が伸縮するため接続部にクラックや
剥れができ、接続の信頼性に欠けるものとなる。
【0010】そこで従来、気泡8を押し出すために、接
着剤7の量を多くしたり、あるいは加熱押圧にゆっくり
時間を掛けている。そのため、接着剤7が無駄に使用さ
れ、あるいは製造効率を悪くしている。
【0011】そこで、この発明では、気泡の残留を効果
的に防止できるフリップチップボンダーを提供するもの
である。
【0012】
【課題を解決するための手段】この発明は、フレキシブ
ル基板を供給する基板供給手段と、フレキシブル基板上
に熱硬化性接着剤を載せる接着剤ノズルと、接着剤が載
せられたフレキシブル基板上にチップ状の電子部品を載
置する電子部品供給アームと、フレキシブル基板の電子
部品が載置される面と反対の面側にシート状部材を供給
するシート供給手段と、フレキシブル基板上に載置され
た電子部品を押圧および加熱する押圧アームとを備えて
なるものである。
【0013】
【作用】電子部品が押圧アームで加熱押圧されるとき、
シート上部材が圧縮変形するため、接着剤内で発生する
気泡が外部に押し出される。そのため、接着剤内に気泡
が残留するのを効果的に防止し得る。
【0014】
【実施例】以下、図1を参照しながら、この発明の一実
施例について説明する。
【0015】同図において、11Sおよび11Tは、そ
れぞれフレキシブル基板1の供給リールおよび巻取りリ
ールである。これらリール11S,11Tの回転はシス
テムコントローラ13によって制御される。
【0016】フレキシブル基板1は、配線パターン2お
よびバンプ6が予め固定された単位ユニット(図4参照
)が複数個連続した構成とされ、リール11S,11T
の回転によって単位ユニット毎に基台14上に移動する
ようにされる。
【0017】15Sおよび15Tは、それぞれフィルム
あるいは紙等からなるテープ(シート状部材)16の供
給リールおよび巻取りリールである。これらリール15
S,15Tの回転はシステムコントローラ13によって
制御される。
【0018】テープ16は基台14とフレキシブル基板
1との間に位置するようにされ、基台14上にフレキシ
ブル基板1の新たな単位ユニットが移動するのに伴って
、リール15S,15Tの回転によってテープ16の新
たな部分が基台14上に移動するようにされる。
【0019】18はICチップ3(図4参照)をフレキ
シブル基板1上に載置するICチップ供給アームである
。このICチップ供給アーム18の動作は、システムコ
ントローラ13で制御される。
【0020】20は、例えばエポキシ樹脂等の熱硬化性
接着剤7(図4参照)をフレキシブル基板1上に載せる
接着剤ノズルである。この接着剤ノズル20の動作はシ
ステムコントローラ13によって制御される。
【0021】22はヒーター23を内蔵する押圧アーム
である。この押圧アーム22の押圧動作は、システムコ
ントローラ13で制御されるプランジャ24によって行
なわれる。
【0022】以上の構成において、まず、リール11S
,11Tの回転によって基台14上にフレキシブル基板
1の新たなユニットが移動されると共に、リール15S
,15Tの回転によって基台14上にテープ16の新た
な部分が移動される。
【0023】次に、接着剤ノズル20が基台14上のフ
レキシブル基板1の単位ユニット上に移動され、その単
位ユニット上に接着剤7が排出される。
【0024】次に、ICチップ供給アーム18によって
基台14上のフレキシブル基板1の単位ユニット上にI
Cチップ3が載置される。このとき、ICチップ3の電
極3aが配線パターン2上に接続されたバンプ6と対向
するようにされる。
【0025】次に、プランジャ24の駆動によって押圧
アーム22が基台14側に移動するようにされ、ICチ
ップ3が加熱されながら基台14側に押圧される。これ
により、ICチップ3の電極3aがバンプ6と接触した
状態となって配線パターン2に接続され、この状態で接
着剤7の加熱硬化によりICチップ3がフレキシブル基
板1上に固着される。
【0026】以下、このようなボンディング動作は、フ
レキシブル基板1の各単位ユニットが基台14上に順次
移動される毎に行なわれる。
【0027】本例においては、基台14とフレキシブル
基板1との間にテープ16が配されるので、押圧アーム
22でICチップ3を加熱押圧するとき、図2Aに示す
ように、テープ16のバンプ6に対応する部分が凹み、
それに伴ってフレキシブル基板1はバンプ6,6間に対
応する中央部が突出するように変形する。
【0028】そのため、接着剤7内に発生する気泡8は
外部に押し出され、ボンディング終了時には接着剤7内
に気泡8は残留しなくなる(図2Bに図示)。
【0029】このように本例のフリップチップボンダー
によれば、接着剤7内に気泡8が残留するのを効果的に
防止することができ、接続の信頼性を上げることができ
る。また、接着剤7の量を多くしたり、ゆっくりと時間
を掛けて加熱押圧して気泡8を押し出すものと比較して
、接着剤7を無駄にすることがなく、製造効率を上げる
ことができる。
【0030】なお、上述実施例においては、フレキシブ
ル基板1にICチップ3を接続固定するものであったが
、その他のチップ状の電子部品をフレキシブル基板に接
続固定する際にも、この発明のフリップチップボンダー
を同様に適用することができる。
【0031】また、上述実施例においては、フレキシブ
ル基板1が移動されると共にテープ16も移動されて順
次新たな部分が使用されるが、テープ16に凹みの復元
性が充分あるときは、テープ16の同一部分を複数回使
用することができる。
【0032】
【発明の効果】この発明によれば、電子部品が押圧アー
ムで加熱押圧されるとき、シート上部材が圧縮変形して
接着剤内で発生する気泡を外部に押し出すので、接着剤
内に気泡が残留するのを効果的に防止でき、接続の信頼
性を上げることができる。また、接着剤の量を多くした
り、ゆっくりと時間を掛けて加熱押圧して気泡を押し出
すものと比較して、接着剤を無駄にすることがなく、製
造の効率を上げることができる。
【図面の簡単な説明】
【図1】実施例の構成を示す図である。
【図2】気泡の押し出し動作を説明するための図である
【図3】ワイヤ・ボンディングの説明のための図である
【図4】フリップチップ・ボンディングの説明のための
図である。
【図5】気泡の残留状態を示す図である。
【符号の説明】
1  フレキシブル基板 2  配線パターン 3  ICチップ 3a  電極 6  バンプ 7接着剤 8  気泡 11S,11T,15S,15T  リール13  シ
ステムコントローラ 14  基台 16  テープ 18  ICチップ供給アーム 20  接着剤ノズル 22  押圧アーム

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】  フレキシブル基板を供給する基板供給
    手段と、上記フレキシブル基板上に熱硬化性接着剤を載
    せる接着剤ノズルと、上記接着剤が載せられたフレキシ
    ブル基板上にチップ状の電子部品を載置する電子部品供
    給アームと、上記フレキシブル基板の上記電子部品が載
    置される面と反対の面側にシート状部材を供給するシー
    ト供給手段と、上記フレキシブル基板上に載置された電
    子部品を押圧および加熱する押圧アームとを備えてなる
    フリップチップボンダー。
JP3120847A 1991-05-27 1991-05-27 フリップチップボンダー Pending JPH04348540A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP3120847A JPH04348540A (ja) 1991-05-27 1991-05-27 フリップチップボンダー
DE69207815T DE69207815T2 (de) 1991-05-27 1992-05-26 Bond-Maschine für Halbleiter-Chips
EP92108857A EP0517071B1 (en) 1991-05-27 1992-05-26 Chip device bonding machine
US07/887,844 US5232532A (en) 1991-05-27 1992-05-26 Chip device bonding machine
KR1019920008963A KR920022433A (ko) 1991-05-27 1992-05-27 칩장치본더와 그 접속고정방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3120847A JPH04348540A (ja) 1991-05-27 1991-05-27 フリップチップボンダー

Publications (1)

Publication Number Publication Date
JPH04348540A true JPH04348540A (ja) 1992-12-03

Family

ID=14796428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3120847A Pending JPH04348540A (ja) 1991-05-27 1991-05-27 フリップチップボンダー

Country Status (5)

Country Link
US (1) US5232532A (ja)
EP (1) EP0517071B1 (ja)
JP (1) JPH04348540A (ja)
KR (1) KR920022433A (ja)
DE (1) DE69207815T2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109813A (ja) * 2005-10-12 2007-04-26 Toshiba Matsushita Display Technology Co Ltd 表示装置の製造装置

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0794539A (ja) * 1993-09-20 1995-04-07 Fujitsu Ltd 半導体装置
US5551197A (en) * 1993-09-30 1996-09-03 Donnelly Corporation Flush-mounted articulated/hinged window assembly
US5548091A (en) * 1993-10-26 1996-08-20 Tessera, Inc. Semiconductor chip connection components with adhesives and methods for bonding to the chip
JP3305843B2 (ja) * 1993-12-20 2002-07-24 株式会社東芝 半導体装置
JPH07240435A (ja) * 1994-03-02 1995-09-12 Toshiba Corp 半導体パッケージの製造方法、半導体の実装方法、および半導体実装装置
DE4410739A1 (de) * 1994-03-28 1995-10-05 Bosch Gmbh Robert Verfahren zum elektrisch leitfähigen Verbinden von Kontakten
US7838115B2 (en) 1995-04-11 2010-11-23 Magna Mirrors Of America, Inc. Method for manufacturing an articulatable vehicular window assembly
US6482289B1 (en) * 1995-10-06 2002-11-19 Motorola, Inc. Nonconductive laminate for coupling substrates and method therefor
JP3801674B2 (ja) 1995-12-15 2006-07-26 松下電器産業株式会社 電子部品の実装方法
JP3519534B2 (ja) * 1996-02-19 2004-04-19 株式会社東芝 ベアチッププローバ装置及びベアチップハンドリング方法
US6460245B1 (en) 1996-03-07 2002-10-08 Tessera, Inc. Method of fabricating semiconductor chip assemblies
JP3771320B2 (ja) * 1996-03-29 2006-04-26 コマツ電子金属株式会社 半導体ウェハの貼付方法及び貼付装置
JP2830852B2 (ja) * 1996-08-08 1998-12-02 松下電器産業株式会社 電子部品実装方法
JP3284262B2 (ja) * 1996-09-05 2002-05-20 セイコーエプソン株式会社 液晶表示装置及びそれを用いた電子機器
KR100384314B1 (ko) * 1996-12-27 2003-05-16 마츠시타 덴끼 산교 가부시키가이샤 회로기판에의 전자부품 실장방법 및 장치
US6077382A (en) * 1997-05-09 2000-06-20 Citizen Watch Co., Ltd Mounting method of semiconductor chip
EP0913268A4 (en) * 1997-05-19 2004-11-17 Hitachi Maxell FLEXIBLE INTEGRATED CIRCUIT MODULE AND ITS PRODUCTION METHOD, INFORMATION MEDIUM PRODUCTION METHOD COMPRISING SAID MODULE
JPH11312881A (ja) 1998-04-28 1999-11-09 Matsushita Electric Ind Co Ltd 基板の接合方法、及び高周波回路、アンテナ、導波管、線路変換器、線路分岐回路、並びに通信システム
JP3537688B2 (ja) * 1998-11-24 2004-06-14 富士通株式会社 磁気ヘッドの加工方法
AU3623000A (en) * 1999-03-10 2000-09-28 Tessera, Inc. Microelectronic joining processes
JP3558921B2 (ja) * 1999-05-14 2004-08-25 シャープ株式会社 テープキャリア並びにテープキャリア型半導体装置の製造方法
US20030009876A1 (en) * 2000-01-14 2003-01-16 Akira Yamauchi Method and device for chip mounting
US6202293B1 (en) * 2000-01-28 2001-03-20 Visteon Global Technologies, Inc. Work holder assembly
DE10010355A1 (de) * 2000-03-07 2001-09-13 Chemetall Gmbh Verfahren zum Aufbringen eines Phosphatüberzuges und Verwendung der derart phosphatierten Metallteile
AT410499B (de) * 2000-10-31 2003-05-26 Datacon Semiconductor Equip Einrichtung zur führung eines linear bewegbaren werkzeuges
US6866741B2 (en) * 2001-01-08 2005-03-15 Fujitsu Limited Method for joining large substrates
US6884313B2 (en) * 2001-01-08 2005-04-26 Fujitsu Limited Method and system for joining and an ultra-high density interconnect
US6800169B2 (en) * 2001-01-08 2004-10-05 Fujitsu Limited Method for joining conductive structures and an electrical conductive article
US6871395B2 (en) * 2001-08-06 2005-03-29 Siemens Technology-To-Business Center, Llc. Methods for manufacturing a tactile sensor using an electrically conductive elastomer
US6759277B1 (en) * 2003-02-27 2004-07-06 Sharp Laboratories Of America, Inc. Crystalline silicon die array and method for assembling crystalline silicon sheets onto substrates
US7047633B2 (en) * 2003-05-23 2006-05-23 National Starch And Chemical Investment Holding, Corporation Method of using pre-applied underfill encapsulant
JP5266723B2 (ja) * 2007-11-07 2013-08-21 富士通株式会社 Rfidタグ製造方法
KR101511584B1 (ko) * 2008-09-25 2015-04-13 해성디에스 주식회사 롤 투 롤 반도체부품 제조장치 및 그에 적용되는 이송방법
DE102012008500A1 (de) * 2012-04-26 2013-10-31 Giesecke & Devrient Gmbh Herstellung eines portablen Datenträgers
EP2675252A1 (en) 2012-06-13 2013-12-18 Polska Wytwornia Papierow Wartosciowych S.A. A method for mounting an electronic element on a substrate with conductive paths sensitive to high temperature
JP5700186B1 (ja) * 2013-07-08 2015-04-15 ソニー株式会社 硬化条件の決定方法、回路デバイスの製造方法及び回路デバイス
TWI581942B (zh) * 2015-04-08 2017-05-11 韋僑科技股份有限公司 跨橋裝置與系統及其軟性電路元件跨橋方法
US10379072B2 (en) 2016-01-04 2019-08-13 Cryovac, Llc Multiple detector apparatus and method for monitoring an environment
DE102016125521B4 (de) * 2016-12-22 2020-10-15 Infineon Technologies Ag Gemeinsames Verfahren zum Verbinden eines elektronischen Chips mit einem Verbinderkörper und zum Ausbilden des Verbinderkörpers

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3855034A (en) * 1973-12-10 1974-12-17 C Miller Method and apparatus for bonding in miniaturized electrical circuits
US4216577A (en) * 1975-12-31 1980-08-12 Compagnie Internationale Pour L'informatique Cii-Honeywell Bull (Societe Anonyme) Portable standardized card adapted to provide access to a system for processing electrical signals and a method of manufacturing such a card
JPS59161040A (ja) * 1983-03-03 1984-09-11 Shinkawa Ltd インナ−リ−ドボンダ−
FR2572619B1 (fr) * 1984-10-30 1986-12-26 Ebauchesfabrik Eta Ag Procede pour l'assemblage et la connexion de circuits integres a des unites de circuits et machine pour sa mise en oeuvre
US4749120A (en) * 1986-12-18 1988-06-07 Matsushita Electric Industrial Co., Ltd. Method of connecting a semiconductor device to a wiring board
JPH077782B2 (ja) * 1988-03-29 1995-01-30 株式会社新川 テープボンデイング方法
JPH01297828A (ja) * 1988-05-25 1989-11-30 Matsushita Electron Corp 半導体装置
JPH02181447A (ja) * 1989-01-06 1990-07-16 Matsushita Electric Ind Co Ltd ダイボンディング装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109813A (ja) * 2005-10-12 2007-04-26 Toshiba Matsushita Display Technology Co Ltd 表示装置の製造装置

Also Published As

Publication number Publication date
DE69207815T2 (de) 1996-09-05
KR920022433A (ko) 1992-12-19
EP0517071B1 (en) 1996-01-24
DE69207815D1 (de) 1996-03-07
EP0517071A1 (en) 1992-12-09
US5232532A (en) 1993-08-03

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