JPH0394183A - 半導体集積回路の試験方法及び回路 - Google Patents

半導体集積回路の試験方法及び回路

Info

Publication number
JPH0394183A
JPH0394183A JP2126128A JP12612890A JPH0394183A JP H0394183 A JPH0394183 A JP H0394183A JP 2126128 A JP2126128 A JP 2126128A JP 12612890 A JP12612890 A JP 12612890A JP H0394183 A JPH0394183 A JP H0394183A
Authority
JP
Japan
Prior art keywords
output
test
data
block
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2126128A
Other languages
English (en)
Japanese (ja)
Inventor
Hideo Tokuda
得田　秀雄
Satoru Tanizawa
谷澤　哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of JPH0394183A publication Critical patent/JPH0394183A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318569—Error indication, logging circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273—Test methods

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2126128A 1989-05-19 1990-05-16 半導体集積回路の試験方法及び回路 Pending JPH0394183A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP12740189 1989-05-19
JP1-127401 1989-05-19

Publications (1)

Publication Number Publication Date
JPH0394183A true JPH0394183A (ja) 1991-04-18

Family

ID=14959079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2126128A Pending JPH0394183A (ja) 1989-05-19 1990-05-16 半導体集積回路の試験方法及び回路

Country Status (5)

Country Link
US (1) US5384533A (de)
EP (1) EP0398816B1 (de)
JP (1) JPH0394183A (de)
KR (1) KR930011423B1 (de)
DE (1) DE69031291T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005291779A (ja) * 2004-03-31 2005-10-20 Kawasaki Microelectronics Kk 半導体集積回路

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* Cited by examiner, † Cited by third party
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US5872448A (en) * 1991-06-18 1999-02-16 Lightspeed Semiconductor Corporation Integrated circuit architecture having an array of test cells providing full controlability for automatic circuit verification
JPH063424A (ja) * 1992-06-22 1994-01-11 Mitsubishi Electric Corp 集積回路装置、および集積回路装置に組込まれるテストデータ発生回路
JPH06249919A (ja) * 1993-03-01 1994-09-09 Fujitsu Ltd 半導体集積回路装置の端子間接続試験方法
DE69433618T2 (de) * 1993-12-16 2005-02-03 Koninklijke Philips Electronics N.V. Gerät zur prüfung der verbindung zwischen dem ausgang einer schaltung mit fester logischer ausgabe und dem eingang eines weiteren schaltkreises
US6035262A (en) * 1994-06-27 2000-03-07 Tandem Computers Incorporated Real time observation serial scan test architecture
US5787096A (en) * 1996-04-23 1998-07-28 Micron Technology, Inc. Circuit and method for testing an integrated circuit
US5727001A (en) 1996-08-14 1998-03-10 Micron Technology, Inc. Circuit and method for testing an integrated circuit
US5754559A (en) * 1996-08-26 1998-05-19 Micron Technology, Inc. Method and apparatus for testing integrated circuits
JP3384272B2 (ja) * 1997-02-27 2003-03-10 安藤電気株式会社 フェイルメモリ
US6223313B1 (en) 1997-12-05 2001-04-24 Lightspeed Semiconductor Corporation Method and apparatus for controlling and observing data in a logic block-based asic
US6611932B2 (en) 1997-12-05 2003-08-26 Lightspeed Semiconductor Corporation Method and apparatus for controlling and observing data in a logic block-based ASIC
US20040193977A1 (en) * 2001-12-20 2004-09-30 Cirrus Logic, Inc. Non-invasive, low pin count test circuits and methods utilizing emulated stress conditions
US6971045B1 (en) * 2002-05-20 2005-11-29 Cyress Semiconductor Corp. Reducing tester channels for high pinout integrated circuits
US7424417B2 (en) * 2002-11-19 2008-09-09 Broadcom Corporation System and method for clock domain grouping using data path relationships
US7460988B2 (en) * 2003-03-31 2008-12-02 Advantest Corporation Test emulator, test module emulator, and record medium storing program therein
US7500165B2 (en) 2004-10-06 2009-03-03 Broadcom Corporation Systems and methods for controlling clock signals during scan testing integrated circuits
JP2019061392A (ja) * 2017-09-26 2019-04-18 ルネサスエレクトロニクス株式会社 マイクロコントローラ及びマイクロコントローラの制御方法

Family Cites Families (21)

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Publication number Priority date Publication date Assignee Title
US4244048A (en) * 1978-12-29 1981-01-06 International Business Machines Corporation Chip and wafer configuration and testing method for large-scale-integrated circuits
US4340857A (en) * 1980-04-11 1982-07-20 Siemens Corporation Device for testing digital circuits using built-in logic block observers (BILBO's)
US4404519A (en) * 1980-12-10 1983-09-13 International Business Machine Company Testing embedded arrays in large scale integrated circuits
US4459693A (en) * 1982-01-26 1984-07-10 Genrad, Inc. Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like
JPS59150441A (ja) * 1983-02-03 1984-08-28 Toshiba Corp 半導体集積回路
GB8432533D0 (en) * 1984-12-21 1985-02-06 Plessey Co Plc Integrated circuits
US4660198A (en) * 1985-04-15 1987-04-21 Control Data Corporation Data capture logic for VLSI chips
US4710931A (en) * 1985-10-23 1987-12-01 Texas Instruments Incorporated Partitioned scan-testing system
US4710933A (en) * 1985-10-23 1987-12-01 Texas Instruments Incorporated Parallel/serial scan system for testing logic circuits
US4931722A (en) * 1985-11-07 1990-06-05 Control Data Corporation Flexible imbedded test system for VLSI circuits
JPH0627776B2 (ja) * 1986-08-04 1994-04-13 三菱電機株式会社 半導体集積回路装置
KR900002770B1 (ko) * 1986-08-04 1990-04-30 미쓰비시 뎅끼 가부시끼가이샤 반도체 집적회로장치
JP2628154B2 (ja) * 1986-12-17 1997-07-09 富士通株式会社 半導体集積回路
JPS63182585A (ja) * 1987-01-26 1988-07-27 Toshiba Corp テスト容易化機能を備えた論理回路
US4872169A (en) * 1987-03-06 1989-10-03 Texas Instruments Incorporated Hierarchical scan selection
JP2725258B2 (ja) * 1987-09-25 1998-03-11 三菱電機株式会社 集積回路装置
JPH0820967B2 (ja) * 1987-09-25 1996-03-04 三菱電機株式会社 集積回路
JPH01132980A (ja) * 1987-11-17 1989-05-25 Mitsubishi Electric Corp テスト機能付電子回路装置
JPH0746130B2 (ja) * 1988-05-19 1995-05-17 富士通株式会社 Ｌｓｉシステム
US5070296A (en) * 1990-06-22 1991-12-03 Honeywell Inc. Integrated circuit interconnections testing
DE4107172C2 (de) * 1991-03-06 1997-08-07 Siemens Ag Schaltungsanordnung zum Testen integrierter digitaler Schaltungen

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005291779A (ja) * 2004-03-31 2005-10-20 Kawasaki Microelectronics Kk 半導体集積回路
JP4530703B2 (ja) * 2004-03-31 2010-08-25 川崎マイクロエレクトロニクス株式会社 半導体集積回路

Also Published As

Publication number Publication date
EP0398816A3 (de) 1992-03-25
EP0398816A2 (de) 1990-11-22
KR900019188A (ko) 1990-12-24
DE69031291D1 (de) 1997-09-25
US5384533A (en) 1995-01-24
EP0398816B1 (de) 1997-08-20
DE69031291T2 (de) 1997-12-18
KR930011423B1 (ko) 1993-12-06

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