JPH0369447B2 - - Google Patents

Info

Publication number
JPH0369447B2
JPH0369447B2 JP59080959A JP8095984A JPH0369447B2 JP H0369447 B2 JPH0369447 B2 JP H0369447B2 JP 59080959 A JP59080959 A JP 59080959A JP 8095984 A JP8095984 A JP 8095984A JP H0369447 B2 JPH0369447 B2 JP H0369447B2
Authority
JP
Japan
Prior art keywords
signal
flip
circuit
data
master side
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59080959A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60224319A (ja
Inventor
Tomokazu Kono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP59080959A priority Critical patent/JPS60224319A/ja
Publication of JPS60224319A publication Critical patent/JPS60224319A/ja
Publication of JPH0369447B2 publication Critical patent/JPH0369447B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3562—Bistable circuits of the primary-secondary type
JP59080959A 1984-04-20 1984-04-20 フリツプ・フロツプ回路 Granted JPS60224319A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59080959A JPS60224319A (ja) 1984-04-20 1984-04-20 フリツプ・フロツプ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59080959A JPS60224319A (ja) 1984-04-20 1984-04-20 フリツプ・フロツプ回路

Publications (2)

Publication Number Publication Date
JPS60224319A JPS60224319A (ja) 1985-11-08
JPH0369447B2 true JPH0369447B2 (enrdf_load_stackoverflow) 1991-11-01

Family

ID=13733046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59080959A Granted JPS60224319A (ja) 1984-04-20 1984-04-20 フリツプ・フロツプ回路

Country Status (1)

Country Link
JP (1) JPS60224319A (enrdf_load_stackoverflow)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH088470B2 (ja) * 1988-12-23 1996-01-29 沖電気工業株式会社 フリップフロップ回路
GB9721082D0 (en) * 1997-10-03 1997-12-03 Cambridge Consultants Integrated circuit
US7394052B2 (en) 2001-07-30 2008-07-01 Nippon Telegraph And Telephone Corporation Parallel processing logic circuit for sensor signal processing
US7577858B2 (en) * 2002-08-28 2009-08-18 Nxp B.V. Method for reducing power consumption in a state retaining circuit, state retaining circuit and electronic device
DE10250869B3 (de) * 2002-10-31 2004-04-29 Infineon Technologies Ag D-Flipflop mit reduzierter Transistoranzahl
JP2006005661A (ja) 2004-06-17 2006-01-05 Matsushita Electric Ind Co Ltd フリップフロップ回路
EP1777818B1 (en) 2004-08-10 2010-04-07 Nippon Telegraph and Telephone Corporation Master-slave flip-flop, trigger flip-flop and counter
US7248090B2 (en) * 2005-01-10 2007-07-24 Qualcomm, Incorporated Multi-threshold MOS circuits
US7180348B2 (en) 2005-03-24 2007-02-20 Arm Limited Circuit and method for storing data in operational and sleep modes
JP4332652B2 (ja) 2005-12-12 2009-09-16 独立行政法人 宇宙航空研究開発機構 シングルイベント耐性のラッチ回路及びフリップフロップ回路
JP4856458B2 (ja) * 2006-03-28 2012-01-18 富士通株式会社 高速動的周波数分周器
US8471597B2 (en) 2008-05-27 2013-06-25 Qualcomm Incorporated Power saving circuit using a clock buffer and multiple flip-flops
JPWO2009147770A1 (ja) * 2008-06-02 2011-10-20 パナソニック株式会社 クロック信号増幅回路
JP5339282B2 (ja) * 2009-02-06 2013-11-13 独立行政法人 宇宙航空研究開発機構 シングルイベント耐性のラッチ回路
JP2011071732A (ja) * 2009-09-25 2011-04-07 Seiko Epson Corp 集積回路装置及び電子機器
EP2869467B1 (en) 2013-11-01 2020-08-05 Nxp B.V. Latch circuit
JP6453732B2 (ja) 2015-09-11 2019-01-16 株式会社東芝 半導体集積回路

Also Published As

Publication number Publication date
JPS60224319A (ja) 1985-11-08

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term