JPH0217874B2 - - Google Patents

Info

Publication number
JPH0217874B2
JPH0217874B2 JP56110189A JP11018981A JPH0217874B2 JP H0217874 B2 JPH0217874 B2 JP H0217874B2 JP 56110189 A JP56110189 A JP 56110189A JP 11018981 A JP11018981 A JP 11018981A JP H0217874 B2 JPH0217874 B2 JP H0217874B2
Authority
JP
Japan
Prior art keywords
pair
bit lines
power supply
transistor
precharge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56110189A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5812193A (ja
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP56110189A priority Critical patent/JPS5812193A/ja
Publication of JPS5812193A publication Critical patent/JPS5812193A/ja
Publication of JPH0217874B2 publication Critical patent/JPH0217874B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Static Random-Access Memory (AREA)
  • Dram (AREA)
JP56110189A 1981-07-15 1981-07-15 半導体メモリ Granted JPS5812193A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56110189A JPS5812193A (ja) 1981-07-15 1981-07-15 半導体メモリ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56110189A JPS5812193A (ja) 1981-07-15 1981-07-15 半導体メモリ

Publications (2)

Publication Number Publication Date
JPS5812193A JPS5812193A (ja) 1983-01-24
JPH0217874B2 true JPH0217874B2 (enrdf_load_html_response) 1990-04-23

Family

ID=14529295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56110189A Granted JPS5812193A (ja) 1981-07-15 1981-07-15 半導体メモリ

Country Status (1)

Country Link
JP (1) JPS5812193A (enrdf_load_html_response)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59155165A (ja) * 1983-02-23 1984-09-04 Toshiba Corp 半導体記憶装置
JPH0715798B2 (ja) * 1983-02-23 1995-02-22 株式会社東芝 半導体記憶装置
JPS6296085U (enrdf_load_html_response) * 1985-12-04 1987-06-19
JPS62197990A (ja) * 1986-02-25 1987-09-01 Mitsubishi Electric Corp 半導体記憶回路
JPH01211394A (ja) * 1988-02-19 1989-08-24 Sony Corp メモリ装置
US5043945A (en) * 1989-09-05 1991-08-27 Motorola, Inc. Memory with improved bit line and write data line equalization
JPH07130177A (ja) * 1993-11-02 1995-05-19 Nec Corp 半導体記憶装置
US6480419B2 (en) * 2001-02-22 2002-11-12 Samsung Electronics Co., Ltd. Bit line setup and discharge circuit for programming non-volatile memory

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5827915B2 (ja) * 1978-07-28 1983-06-13 富士通株式会社 リセット回路
JPS5619587A (en) * 1979-07-27 1981-02-24 Nec Corp Memory circuit
JPS5647990A (en) * 1979-09-21 1981-04-30 Nec Corp Memory device

Also Published As

Publication number Publication date
JPS5812193A (ja) 1983-01-24

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