JPS5647990A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5647990A
JPS5647990A JP12225079A JP12225079A JPS5647990A JP S5647990 A JPS5647990 A JP S5647990A JP 12225079 A JP12225079 A JP 12225079A JP 12225079 A JP12225079 A JP 12225079A JP S5647990 A JPS5647990 A JP S5647990A
Authority
JP
Japan
Prior art keywords
threshold level
precharging
voltage
digit lines
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12225079A
Other languages
Japanese (ja)
Inventor
Koji Ozawa
Yasuhiko Nagahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12225079A priority Critical patent/JPS5647990A/en
Publication of JPS5647990A publication Critical patent/JPS5647990A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Abstract

PURPOSE:To eliminate charge unbalance between digit lines by setting the absolute threshold level of MISFET, selecting a connection between two digit lines, lower than the threshold level of each digit line precharging MISFET. CONSTITUTION:The absolute threshold level of MISFETQ33 making a selective connection between digit lines D1 and D1' is set much lower than the threshold levels of precharging MISFETs Q31 and Q32 connected to FETQ33 at gates in common. As a result, as precharging voltage P rises, only FETQ33 conducts firstly to hold nodes N31 and N32 of lines D1 and D1' at the same potential. Next, as voltage P rises further, nodes N31 and N32 are charged without unbalance according to differences in threshold level between the above-mentioned voltage and FETs Q31 and Q32 even if threshold levels of FETs Q31 and Q32 vary slightly because FETQ13 stays ON, so that the memory unit will increase in sensitivity.
JP12225079A 1979-09-21 1979-09-21 Memory device Pending JPS5647990A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12225079A JPS5647990A (en) 1979-09-21 1979-09-21 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12225079A JPS5647990A (en) 1979-09-21 1979-09-21 Memory device

Publications (1)

Publication Number Publication Date
JPS5647990A true JPS5647990A (en) 1981-04-30

Family

ID=14831300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12225079A Pending JPS5647990A (en) 1979-09-21 1979-09-21 Memory device

Country Status (1)

Country Link
JP (1) JPS5647990A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5812193A (en) * 1981-07-15 1983-01-24 Toshiba Corp Semiconductor memory
JPS6129496A (en) * 1984-07-19 1986-02-10 Toshiba Corp Semiconductor memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5812193A (en) * 1981-07-15 1983-01-24 Toshiba Corp Semiconductor memory
JPH0217874B2 (en) * 1981-07-15 1990-04-23 Tokyo Shibaura Electric Co
JPS6129496A (en) * 1984-07-19 1986-02-10 Toshiba Corp Semiconductor memory

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