JP7456083B2 - ロウハンマ緩和のホスト支援のためのリフレッシュコマンド制御 - Google Patents

ロウハンマ緩和のホスト支援のためのリフレッシュコマンド制御 Download PDF

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Publication number
JP7456083B2
JP7456083B2 JP2020019978A JP2020019978A JP7456083B2 JP 7456083 B2 JP7456083 B2 JP 7456083B2 JP 2020019978 A JP2020019978 A JP 2020019978A JP 2020019978 A JP2020019978 A JP 2020019978A JP 7456083 B2 JP7456083 B2 JP 7456083B2
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refresh
memory
commands
row
activation
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JP2020166832A (ja
JP2020166832A5 (enExample
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ネイル ビル
イー． コックス クリストファー
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618—Refresh operations over multiple banks or interleaving

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Databases & Information Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Dram (AREA)
  • Memory System (AREA)
JP2020019978A 2019-03-29 2020-02-07 ロウハンマ緩和のホスト支援のためのリフレッシュコマンド制御 Active JP7456083B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023164191A JP7775562B2 (ja) 2019-03-29 2023-09-27 ロウハンマ緩和のホスト支援のためのリフレッシュコマンド制御

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/370,578 US10950288B2 (en) 2019-03-29 2019-03-29 Refresh command control for host assist of row hammer mitigation
US16/370,578 2019-03-29

Related Child Applications (1)

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JP2020166832A JP2020166832A (ja) 2020-10-08
JP2020166832A5 JP2020166832A5 (enExample) 2024-02-07
JP7456083B2 true JP7456083B2 (ja) 2024-03-27

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JP2023164191A Active JP7775562B2 (ja) 2019-03-29 2023-09-27 ロウハンマ緩和のホスト支援のためのリフレッシュコマンド制御

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US (4) US10950288B2 (enExample)
JP (2) JP7456083B2 (enExample)
KR (2) KR20200115115A (enExample)
CN (2) CN119517108A (enExample)
DE (1) DE102020104367A1 (enExample)

Families Citing this family (107)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9324398B2 (en) 2013-02-04 2016-04-26 Micron Technology, Inc. Apparatuses and methods for targeted refreshing of memory
US9047978B2 (en) 2013-08-26 2015-06-02 Micron Technology, Inc. Apparatuses and methods for selective row refreshes
JP2015219938A (ja) 2014-05-21 2015-12-07 マイクロン テクノロジー， インク． 半導体装置
JP2017182854A (ja) 2016-03-31 2017-10-05 マイクロン テクノロジー， インク． 半導体装置
FR3066842B1 (fr) * 2017-05-24 2019-11-08 Upmem Logique de correction de row hammer pour dram avec processeur integre
US10580475B2 (en) 2018-01-22 2020-03-03 Micron Technology, Inc. Apparatuses and methods for calculating row hammer refresh addresses in a semiconductor device
US11152050B2 (en) 2018-06-19 2021-10-19 Micron Technology, Inc. Apparatuses and methods for multiple row hammer refresh address sequences
US10726903B2 (en) * 2018-09-21 2020-07-28 Nanya Technology Corporation Row-determining circuit, DRAM, and method for refreshing a memory array
US10685696B2 (en) 2018-10-31 2020-06-16 Micron Technology, Inc. Apparatuses and methods for access based refresh timing
WO2020117686A1 (en) 2018-12-03 2020-06-11 Micron Technology, Inc. Semiconductor device performing row hammer refresh operation
US10957377B2 (en) 2018-12-26 2021-03-23 Micron Technology, Inc. Apparatuses and methods for distributed targeted refresh operations
US10770127B2 (en) 2019-02-06 2020-09-08 Micron Technology, Inc. Apparatuses and methods for managing row access counts
US11043254B2 (en) 2019-03-19 2021-06-22 Micron Technology, Inc. Semiconductor device having cam that stores address signals
US10950288B2 (en) 2019-03-29 2021-03-16 Intel Corporation Refresh command control for host assist of row hammer mitigation
US11264096B2 (en) 2019-05-14 2022-03-01 Micron Technology, Inc. Apparatuses, systems, and methods for a content addressable memory cell with latch and comparator circuits
US11158364B2 (en) 2019-05-31 2021-10-26 Micron Technology, Inc. Apparatuses and methods for tracking victim rows
US11158373B2 (en) 2019-06-11 2021-10-26 Micron Technology, Inc. Apparatuses, systems, and methods for determining extremum numerical values
US11139015B2 (en) * 2019-07-01 2021-10-05 Micron Technology, Inc. Apparatuses and methods for monitoring word line accesses
US10832792B1 (en) 2019-07-01 2020-11-10 Micron Technology, Inc. Apparatuses and methods for adjusting victim data
US11386946B2 (en) 2019-07-16 2022-07-12 Micron Technology, Inc. Apparatuses and methods for tracking row accesses
US10943636B1 (en) 2019-08-20 2021-03-09 Micron Technology, Inc. Apparatuses and methods for analog row access tracking
US10964378B2 (en) 2019-08-22 2021-03-30 Micron Technology, Inc. Apparatus and method including analog accumulator for determining row access rate and target row address used for refresh operation
US11200942B2 (en) 2019-08-23 2021-12-14 Micron Technology, Inc. Apparatuses and methods for lossy row access counting
US10916292B1 (en) * 2019-08-28 2021-02-09 Micron Technology, Inc. Performing a refresh operation based on system characteristics
US11621028B2 (en) * 2020-03-11 2023-04-04 SK Hynix Inc. Memory with capability to detect rows that are prone to data loss, memory system and operation method of memory
US11222685B2 (en) * 2020-05-15 2022-01-11 Advanced Micro Devices, Inc. Refresh management for DRAM
US11561862B2 (en) 2020-05-29 2023-01-24 Advanced Micro Devices, Inc. Refresh management for DRAM
US11361811B2 (en) * 2020-06-23 2022-06-14 Upmem Method and circuit for protecting a DRAM memory device from the row hammer effect
US11120860B1 (en) * 2020-08-06 2021-09-14 Micron Technology, Inc. Staggering refresh address counters of a number of memory devices, and related methods, devices, and systems
US11222682B1 (en) 2020-08-31 2022-01-11 Micron Technology, Inc. Apparatuses and methods for providing refresh addresses
US11809743B2 (en) * 2020-09-21 2023-11-07 Advanced Micro Devices, Inc. Refresh management list for DRAM
CN114388049B (zh) * 2020-10-16 2023-09-12 长鑫存储技术有限公司 存储器测试方法
US12308069B2 (en) * 2020-10-26 2025-05-20 Qualcomm Incorporated DRAM with quick random row refresh for rowhammer mitigation
US11947840B2 (en) * 2020-10-30 2024-04-02 Micron Technology, Inc. Inter-die refresh control
US11410715B2 (en) 2020-11-06 2022-08-09 Micron Technology, Inc. Apparatus with refresh management mechanism
KR20220062843A (ko) * 2020-11-09 2022-05-17 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
US11462291B2 (en) 2020-11-23 2022-10-04 Micron Technology, Inc. Apparatuses and methods for tracking word line accesses
US11474746B2 (en) * 2020-12-10 2022-10-18 Advanced Micro Devices, Inc. Refresh management for DRAM
US11790975B2 (en) 2020-12-10 2023-10-17 SK Hynix Inc. Memory controller and memory system
KR102385443B1 (ko) 2020-12-21 2022-04-12 서울대학교 산학협력단 카운터 기반의 로우 해머 방지를 위한 선택적 로우 해머 리프레쉬 장치 및 그 방법
US11482275B2 (en) 2021-01-20 2022-10-25 Micron Technology, Inc. Apparatuses and methods for dynamically allocated aggressor detection
US11972788B2 (en) * 2021-03-11 2024-04-30 Micron Technology, Inc. Apparatuses, systems, and methods for controller directed targeted refresh operations based on sampling command
CN112786087B (zh) * 2021-03-15 2022-04-26 长鑫存储技术有限公司 刷新电路及存储器
US11600314B2 (en) 2021-03-15 2023-03-07 Micron Technology, Inc. Apparatuses and methods for sketch circuits for refresh binning
EP4191592A4 (en) 2021-03-15 2024-07-10 Changxin Memory Technologies, Inc. Refresh control circuit and memory
US11854595B2 (en) 2021-03-15 2023-12-26 Changxin Memory Technologies, Inc. Refresh circuit and memory
US11869567B2 (en) 2021-03-15 2024-01-09 Changxin Memory Technologies, Inc. Refresh control circuit and memory
FR3121262A1 (fr) * 2021-03-29 2022-09-30 Upmem Dispositif mémoire et procédé de protection d’un dispositif mémoire de l’effet de martelage d’un rang
JP7574720B2 (ja) * 2021-04-05 2024-10-29 富士通株式会社 メモリ管理装置、メモリ管理方法及びメモリ管理プログラム
US12347507B2 (en) * 2021-05-03 2025-07-01 Intel Corporation Method and apparatus for memory chip row hammer threat backpressure signal and host side response
US12164803B2 (en) * 2021-05-21 2024-12-10 Micron Technology, Inc. Memory with memory-initiated command insertion, and associated systems, devices, and methods
US12027199B2 (en) 2021-05-26 2024-07-02 Samsung Electronics Co., Ltd. Memory device and method of controlling row hammer
US11955159B2 (en) * 2021-07-20 2024-04-09 Samsung Electronics Co., Ltd. Semiconductor memory device and memory system including the same
US11664063B2 (en) 2021-08-12 2023-05-30 Micron Technology, Inc. Apparatuses and methods for countering memory attacks
US12346600B2 (en) 2021-08-26 2025-07-01 SK Hynix Inc. Memory module, memory system including memory module, and method of operating the same
KR20230032052A (ko) 2021-08-30 2023-03-07 삼성전자주식회사 메모리 컨트롤러 및 메모리 시스템
US12175087B2 (en) * 2021-09-28 2024-12-24 Advanced Micro Devices, Inc. Method and apparatus for protecting memory devices via a synergic approach
KR20230051835A (ko) 2021-10-12 2023-04-19 삼성전자주식회사 반도체 메모리 장치 및 반도체 메모리 장치의 동작 방법
KR20230051873A (ko) 2021-10-12 2023-04-19 삼성전자주식회사 해머 리프레시 로우 어드레스 검출기, 이를 포함하는 반도체 메모리 장치 및 메모리 모듈
CN116153357B (zh) * 2021-11-19 2025-05-30 长鑫存储技术有限公司 一种锤击刷新方法、锤击刷新电路及半导体存储器
EP4210059B1 (en) 2021-11-19 2025-07-16 Changxin Memory Technologies, Inc. Row hammer refresh method, row hammer refresh circuit, and semiconductor memory
US11688451B2 (en) 2021-11-29 2023-06-27 Micron Technology, Inc. Apparatuses, systems, and methods for main sketch and slim sketch circuit for row address tracking
KR102890786B1 (ko) 2021-11-30 2025-11-26 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
US12236993B2 (en) * 2021-12-02 2025-02-25 Samsung Electronics Co., Ltd. Memory device detecting weakness of operation pattern and method of operating the same
KR20230088042A (ko) * 2021-12-10 2023-06-19 삼성전자주식회사 메모리 장치
CN114242132B (zh) * 2021-12-15 2025-09-16 海光信息技术股份有限公司 一种内存刷新计数的方法、装置以及内存控制器
US12105971B2 (en) 2021-12-22 2024-10-01 Micron Technology, Inc. Dual-level refresh management
US12443367B2 (en) * 2021-12-23 2025-10-14 Intel Corporation Perfect row hammer tracking with multiple count increments
US12165687B2 (en) 2021-12-29 2024-12-10 Micron Technology, Inc. Apparatuses and methods for row hammer counter mat
US20230206989A1 (en) * 2021-12-29 2023-06-29 Micron Technology, Inc. Apparatuses and methods for row hammer counter mat
KR20230105091A (ko) 2022-01-03 2023-07-11 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
US12236105B2 (en) 2022-01-11 2025-02-25 Samsung Electronics Co., Ltd. Semiconductor memory devices having enhanced refresh operations that inhibit row hammer hacking
US12248567B2 (en) * 2022-01-21 2025-03-11 Micron Technology, Inc. Row hammer interrupts to the operating system
US12131768B2 (en) * 2022-01-24 2024-10-29 Micron Technology, Inc. Dynamic random access memory (DRAM) multi-wordline direct refresh management including aliasing row counter policy for row hammer mitigation
US12265630B2 (en) * 2022-01-27 2025-04-01 Micron Technology, Inc. Row access strobe (RAS) clobber and row hammer failures using a deterministic protocol
CN116778992A (zh) 2022-03-15 2023-09-19 美光科技公司 行锤遥测
US12125514B2 (en) * 2022-04-28 2024-10-22 Micron Technology, Inc. Apparatuses and methods for access based refresh operations
US12112787B2 (en) 2022-04-28 2024-10-08 Micron Technology, Inc. Apparatuses and methods for access based targeted refresh operations
US12086415B2 (en) * 2022-05-05 2024-09-10 Micron Technology, Inc. Frequency regulation for memory management commands
KR20230163172A (ko) * 2022-05-23 2023-11-30 에스케이하이닉스 주식회사 로우해머링추적동작을 수행하기 위한 반도체시스템
KR20230163776A (ko) * 2022-05-24 2023-12-01 에스케이하이닉스 주식회사 메모리 및 메모리의 동작 방법
US20220293162A1 (en) * 2022-06-01 2022-09-15 Intel Corporation Randomization of directed refresh management (drfm) pseudo target row refresh (ptrr) commands
CN117174134A (zh) 2022-06-02 2023-12-05 美光科技公司 使用分层检测器的行锤缓解
US12067270B2 (en) 2022-06-02 2024-08-20 Micron Technology, Inc. Memory device security and row hammer mitigation
US12118221B2 (en) * 2022-06-22 2024-10-15 Samsung Electronics Co., Ltd. Semiconductor memory devices and memory systems including the same
EP4325498A4 (en) * 2022-06-23 2024-06-26 Changxin Memory Technologies, Inc. COOLING CONTROL CIRCUIT AND ASSOCIATED METHOD, AND MEMORY
US12236996B2 (en) 2022-06-27 2025-02-25 Samsung Electronics Co., Ltd. Memory device and refresh method thereof
US11935623B2 (en) * 2022-06-28 2024-03-19 Montage Technology (Kunshan) Co. Apparatus for controlling access to a memory device and memory system comprising the same
KR20240013495A (ko) * 2022-07-22 2024-01-30 삼성전자주식회사 메모리 장치 및 그 리프레시 방법
US12315553B2 (en) 2022-07-26 2025-05-27 Micron Technology, Inc. Selectable row hammer mitigation
CN117636939A (zh) * 2022-08-15 2024-03-01 长鑫存储技术有限公司 获取行锤刷新地址的方法和设备
US12211543B2 (en) * 2022-09-08 2025-01-28 Qualcomm Incorporated Dynamic rowhammer management
US11948656B1 (en) * 2022-09-21 2024-04-02 Micron Technology, Inc. Counter management for memory systems
US11922031B1 (en) * 2022-09-23 2024-03-05 Micron Technology, Inc. Apparatus with directed refresh management mechanism
US12322434B2 (en) * 2022-09-30 2025-06-03 Advanced Micro Devices, Inc. Directed refresh management for DRAM
KR20240053156A (ko) * 2022-10-17 2024-04-24 삼성전자주식회사 메모리 장치 및 그 동작 방법
CN115357952B (zh) * 2022-10-18 2023-02-03 合肥奎芯集成电路设计有限公司 针对动态存储器的行锤攻击防御方法和装置
KR20240067516A (ko) 2022-11-09 2024-05-17 삼성전자주식회사 메모리 장치 및 그의 동작 방법
KR20240076197A (ko) 2022-11-23 2024-05-30 삼성전자주식회사 Cxl 디바이스 및 cxl 디바이스의 동작 방법
KR102843236B1 (ko) * 2022-12-28 2025-08-05 한양대학교 산학협력단 반도체 메모리 장치 및 이의 로우 해머 방지 방법
FR3147016B1 (fr) * 2023-03-21 2025-02-07 Commissariat Energie Atomique Procédé de gestion d’une mémoire cache
KR20240143291A (ko) 2023-03-24 2024-10-02 에스케이하이닉스 주식회사 카운팅 동작을 수행하는 메모리, 메모리 시스템 및 메모리의 동작 방법
KR20240178809A (ko) * 2023-06-23 2024-12-31 에스케이하이닉스 주식회사 메모리 컨트롤러 및 이를 포함하는 메모리 시스템
US12488108B2 (en) 2023-07-12 2025-12-02 Nanya Technology Corporation Memory device and control method for controlling memory device
US12189541B1 (en) * 2023-08-28 2025-01-07 Nanya Technology Corporation Memory device and control method for controlling memory device
US20250299723A1 (en) * 2024-03-20 2025-09-25 Micron Technology, Inc. Apparatuses systems and methods for memory with access based refresh control
KR102824636B1 (ko) * 2024-08-16 2025-06-24 주식회사 쿼드마이너 공격 위험도 결정 장치 및 그 방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150003180A1 (en) 2013-06-28 2015-01-01 SK Hynix Inc. Semiconductor device and operation method thereof
JP2015176629A (ja) 2014-03-17 2015-10-05 日本電気株式会社 アクセス回数カウント装置、メモリシステム、および、アクセス回数カウント方法
JP2016504702A (ja) 2012-11-30 2016-02-12 インテル・コーポレーション 格納されたロウハンマ閾値に基づくロウハンマの監視
WO2017175392A1 (ja) 2016-04-08 2017-10-12 ウルトラメモリ株式会社 半導体記憶装置
US20180158507A1 (en) 2016-12-06 2018-06-07 Jong-Min BANG Memory device and memory system performing a hammer refresh operation and associated operations

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9236110B2 (en) 2012-06-30 2016-01-12 Intel Corporation Row hammer refresh command
US9286964B2 (en) 2012-12-21 2016-03-15 Intel Corporation Method, apparatus and system for responding to a row hammer event
US9318182B2 (en) * 2013-01-30 2016-04-19 Intel Corporation Apparatus, method and system to determine memory access command timing based on error detection
US9324398B2 (en) 2013-02-04 2016-04-26 Micron Technology, Inc. Apparatuses and methods for targeted refreshing of memory
US10373667B2 (en) 2013-08-28 2019-08-06 Hewlett Packard Enterprise Development Lp Refresh rate adjust
US9431085B2 (en) * 2014-03-28 2016-08-30 Synopsys, Inc. Most activated memory portion handling
US20170110178A1 (en) 2015-09-17 2017-04-20 Intel Corporation Hybrid refresh with hidden refreshes and external refreshes
US9812185B2 (en) 2015-10-21 2017-11-07 Invensas Corporation DRAM adjacent row disturb mitigation
KR102329673B1 (ko) * 2016-01-25 2021-11-22 삼성전자주식회사 해머 리프레쉬 동작을 수행하는 메모리 장치 및 이를 포함하는 메모리 시스템
KR102468728B1 (ko) * 2016-08-23 2022-11-21 에스케이하이닉스 주식회사 리프레쉬 제어 회로, 반도체 메모리 장치 및 그의 동작 방법
US20180096719A1 (en) * 2016-09-30 2018-04-05 Intel Corporation Staggering initiation of refresh in a group of memory devices
JP2018081642A (ja) * 2016-11-18 2018-05-24 キヤノン株式会社 メモリコントローラおよび方法
US10490251B2 (en) 2017-01-30 2019-11-26 Micron Technology, Inc. Apparatuses and methods for distributing row hammer refresh events across a memory device
US10192608B2 (en) * 2017-05-23 2019-01-29 Micron Technology, Inc. Apparatuses and methods for detection refresh starvation of a memory
JP6281030B1 (ja) * 2017-08-02 2018-02-14 ゼンテルジャパン株式会社 半導体記憶装置
US20190096472A1 (en) 2017-09-25 2019-03-28 Intel Corporation Memory chip having reduced baseline refresh rate with additional refreshing for weak cells
US10410710B2 (en) 2017-12-27 2019-09-10 Micron Technology, Inc. Systems and methods for performing row hammer refresh operations in redundant memory
KR102358563B1 (ko) * 2018-05-09 2022-02-04 삼성전자주식회사 로우 해머 핸들링과 함께 리프레쉬 동작을 수행하는 메모리 장치 및 이를 포함하는 메모리 시스템
US10825534B2 (en) 2018-10-26 2020-11-03 Intel Corporation Per row activation count values embedded in storage cell array storage cells
US10685696B2 (en) * 2018-10-31 2020-06-16 Micron Technology, Inc. Apparatuses and methods for access based refresh timing
US10636476B2 (en) 2018-11-01 2020-04-28 Intel Corporation Row hammer mitigation with randomization of target row selection
US10969997B2 (en) 2018-11-07 2021-04-06 Intel Corporation Memory controller that filters a count of row activate commands collectively sent to a set of memory banks
US10950288B2 (en) * 2019-03-29 2021-03-16 Intel Corporation Refresh command control for host assist of row hammer mitigation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016504702A (ja) 2012-11-30 2016-02-12 インテル・コーポレーション 格納されたロウハンマ閾値に基づくロウハンマの監視
US20150003180A1 (en) 2013-06-28 2015-01-01 SK Hynix Inc. Semiconductor device and operation method thereof
JP2015176629A (ja) 2014-03-17 2015-10-05 日本電気株式会社 アクセス回数カウント装置、メモリシステム、および、アクセス回数カウント方法
WO2017175392A1 (ja) 2016-04-08 2017-10-12 ウルトラメモリ株式会社 半導体記憶装置
US20180158507A1 (en) 2016-12-06 2018-06-07 Jong-Min BANG Memory device and memory system performing a hammer refresh operation and associated operations

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