JP2021111333A5 - - Google Patents

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Publication number
JP2021111333A5
JP2021111333A5 JP2020150180A JP2020150180A JP2021111333A5 JP 2021111333 A5 JP2021111333 A5 JP 2021111333A5 JP 2020150180 A JP2020150180 A JP 2020150180A JP 2020150180 A JP2020150180 A JP 2020150180A JP 2021111333 A5 JP2021111333 A5 JP 2021111333A5
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JP
Japan
Prior art keywords
memory
write
write count
data
memory arrays
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JP2020150180A
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English (en)
Japanese (ja)
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JP7687768B2 (ja
JP2021111333A (ja
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Priority claimed from US16/742,332 external-priority patent/US11200113B2/en
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JP2020150180A 2020-01-14 2020-09-07 不揮発性メモリの自動インクリメント書き込みカウント Active JP7687768B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/742,332 2020-01-14
US16/742,332 US11200113B2 (en) 2020-01-14 2020-01-14 Auto-increment write count for nonvolatile memory

Publications (3)

Publication Number Publication Date
JP2021111333A JP2021111333A (ja) 2021-08-02
JP2021111333A5 true JP2021111333A5 (enExample) 2025-01-29
JP7687768B2 JP7687768B2 (ja) 2025-06-03

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JP2020150180A Active JP7687768B2 (ja) 2020-01-14 2020-09-07 不揮発性メモリの自動インクリメント書き込みカウント

Country Status (5)

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US (1) US11200113B2 (enExample)
EP (1) EP3852109B1 (enExample)
JP (1) JP7687768B2 (enExample)
KR (1) KR20210091647A (enExample)
CN (1) CN113129949A (enExample)

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JP7401193B2 (ja) * 2019-04-17 2023-12-19 キヤノン株式会社 情報処理装置及びその制御方法並びにプログラム
US11403195B2 (en) * 2019-08-07 2022-08-02 Micron Technology, Inc. Application of dynamic trim strategy in a die-protection memory sub-system
US11561729B2 (en) 2020-08-19 2023-01-24 Micron Technology, Inc. Write determination counter
US11373705B2 (en) * 2020-11-23 2022-06-28 Micron Technology, Inc. Dynamically boosting read voltage for a memory device
US11971815B2 (en) * 2021-08-31 2024-04-30 Micron Technology, Inc. Write budget control of time-shift buffer for streaming devices
CN119234273A (zh) 2023-04-29 2024-12-31 长江存储科技有限责任公司 执行写入干扰管理的存储器控制器和存储器系统

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JP4394413B2 (ja) * 2003-10-24 2010-01-06 株式会社日立製作所 情報記憶装置及び情報処理システム
US7631138B2 (en) * 2003-12-30 2009-12-08 Sandisk Corporation Adaptive mode switching of flash memory address mapping based on host usage characteristics
US9153337B2 (en) 2006-12-11 2015-10-06 Marvell World Trade Ltd. Fatigue management system and method for hybrid nonvolatile solid state memory system
KR101411499B1 (ko) * 2008-05-19 2014-07-01 삼성전자주식회사 가변 저항 메모리 장치 및 그것의 관리 방법
US7830726B2 (en) 2008-09-30 2010-11-09 Seagate Technology Llc Data storage using read-mask-write operation
JP2012027649A (ja) * 2010-07-22 2012-02-09 Toshiba Corp データ記憶装置及びデータ読み出し方法
US9176800B2 (en) * 2011-08-31 2015-11-03 Micron Technology, Inc. Memory refresh methods and apparatuses
JP2013246533A (ja) * 2012-05-24 2013-12-09 Sony Corp 電子機器、メモリ管理システムおよびメモリ管理方法
KR20140008702A (ko) 2012-07-11 2014-01-22 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 쓰기 방법
US9424946B2 (en) * 2013-02-08 2016-08-23 Seagate Technology Llc Non-volatile buffering to enable sloppy writes and fast write verification
US9430375B2 (en) * 2013-12-30 2016-08-30 International Business Machines Corporation Techniques for storing data in bandwidth optimized or coding rate optimized code words based on data access frequency
KR102244618B1 (ko) * 2014-02-21 2021-04-26 삼성전자 주식회사 플래시 메모리 시스템 및 플래시 메모리 시스템의 제어 방법
WO2016004388A1 (en) * 2014-07-03 2016-01-07 Yale University Circuitry for ferroelectric fet-based dynamic random access memory and non-volatile memory
JP6421042B2 (ja) * 2015-01-16 2018-11-07 ルネサスエレクトロニクス株式会社 情報処理装置
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US10592114B2 (en) * 2016-03-03 2020-03-17 Samsung Electronics Co., Ltd. Coordinated in-module RAS features for synchronous DDR compatible memory
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JP2018120346A (ja) * 2017-01-24 2018-08-02 日本電気株式会社 情報処理システムおよび情報処理システムの制御方法
US11099760B2 (en) * 2017-12-14 2021-08-24 Intel Corporation Background data refresh using a system timestamp in storage devices
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