JP7687768B2 - 不揮発性メモリの自動インクリメント書き込みカウント - Google Patents

不揮発性メモリの自動インクリメント書き込みカウント Download PDF

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JP7687768B2
JP7687768B2 JP2020150180A JP2020150180A JP7687768B2 JP 7687768 B2 JP7687768 B2 JP 7687768B2 JP 2020150180 A JP2020150180 A JP 2020150180A JP 2020150180 A JP2020150180 A JP 2020150180A JP 7687768 B2 JP7687768 B2 JP 7687768B2
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memory
write
write count
data
memory arrays
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JP2021111333A (ja
JP2021111333A5 (enExample
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カワミ シェコウフェー
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
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    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
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    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
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    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
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    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0688—Non-volatile semiconductor memory arrays
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
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    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/542—Event management; Broadcasting; Multicasting; Notifications
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
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    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/004—Error avoidance
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    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3034—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a storage system, e.g. DASD based or network based
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
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    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88—Monitoring involving counting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0076—Write operation performed depending on read result
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2263—Write conditionally, e.g. only if new data and old data differ

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
  • Multimedia (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
JP2020150180A 2020-01-14 2020-09-07 不揮発性メモリの自動インクリメント書き込みカウント Active JP7687768B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/742,332 US11200113B2 (en) 2020-01-14 2020-01-14 Auto-increment write count for nonvolatile memory
US16/742,332 2020-01-14

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JP2021111333A JP2021111333A (ja) 2021-08-02
JP2021111333A5 JP2021111333A5 (enExample) 2025-01-29
JP7687768B2 true JP7687768B2 (ja) 2025-06-03

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US (1) US11200113B2 (enExample)
EP (1) EP3852109B1 (enExample)
JP (1) JP7687768B2 (enExample)
KR (1) KR20210091647A (enExample)
CN (1) CN113129949A (enExample)

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JP7401193B2 (ja) * 2019-04-17 2023-12-19 キヤノン株式会社 情報処理装置及びその制御方法並びにプログラム
US11403195B2 (en) * 2019-08-07 2022-08-02 Micron Technology, Inc. Application of dynamic trim strategy in a die-protection memory sub-system
US11561729B2 (en) * 2020-08-19 2023-01-24 Micron Technology, Inc. Write determination counter
US11373705B2 (en) * 2020-11-23 2022-06-28 Micron Technology, Inc. Dynamically boosting read voltage for a memory device
US11971815B2 (en) * 2021-08-31 2024-04-30 Micron Technology, Inc. Write budget control of time-shift buffer for streaming devices
US12056361B2 (en) * 2022-07-26 2024-08-06 Macronix International Co., Ltd. Memory device and operation method thereof
WO2024227267A1 (en) * 2023-04-29 2024-11-07 Yangtze Memory Technologies Co., Ltd. Memory controller and memory system performing write disturbance management
US12670940B2 (en) 2024-09-30 2026-06-30 Globalfoundries U.S. Inc. Predecoders with write logic bypass path and memory structure including predecoders

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JP2007517320A (ja) 2003-12-30 2007-06-28 サンディスク コーポレイション ホストの使用特性に基づいたフラッシュメモリのアドレスマッピングの適応的モード切り換え
JP2012027649A (ja) 2010-07-22 2012-02-09 Toshiba Corp データ記憶装置及びデータ読み出し方法
JP2013246533A (ja) 2012-05-24 2013-12-09 Sony Corp 電子機器、メモリ管理システムおよびメモリ管理方法
JP2017504920A (ja) 2013-12-30 2017-02-09 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation 不揮発性メモリ・アレイを含むデータ・ストレージ・システムを動作させるための方法、システム及びコンピュータ・プログラム
JP2016133874A (ja) 2015-01-16 2016-07-25 ルネサスエレクトロニクス株式会社 情報処理装置及びフラッシュメモリ制御方法
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JP2021111333A (ja) 2021-08-02
EP3852109A1 (en) 2021-07-21
CN113129949A (zh) 2021-07-16
US11200113B2 (en) 2021-12-14
KR20210091647A (ko) 2021-07-22
EP3852109B1 (en) 2025-04-30
US20200151052A1 (en) 2020-05-14

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