JP7687768B2 - 不揮発性メモリの自動インクリメント書き込みカウント - Google Patents
不揮発性メモリの自動インクリメント書き込みカウント Download PDFInfo
- Publication number
- JP7687768B2 JP7687768B2 JP2020150180A JP2020150180A JP7687768B2 JP 7687768 B2 JP7687768 B2 JP 7687768B2 JP 2020150180 A JP2020150180 A JP 2020150180A JP 2020150180 A JP2020150180 A JP 2020150180A JP 7687768 B2 JP7687768 B2 JP 7687768B2
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- JP
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- Prior art keywords
- memory
- write
- write count
- data
- memory arrays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/542—Event management; Broadcasting; Multicasting; Notifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/546—Message passing systems or structures, e.g. queues
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
- G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/004—Error avoidance
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3034—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a storage system, e.g. DASD based or network based
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/88—Monitoring involving counting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0076—Write operation performed depending on read result
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2263—Write conditionally, e.g. only if new data and old data differ
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Software Systems (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Multimedia (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/742,332 | 2020-01-14 | ||
| US16/742,332 US11200113B2 (en) | 2020-01-14 | 2020-01-14 | Auto-increment write count for nonvolatile memory |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2021111333A JP2021111333A (ja) | 2021-08-02 |
| JP2021111333A5 JP2021111333A5 (enExample) | 2025-01-29 |
| JP7687768B2 true JP7687768B2 (ja) | 2025-06-03 |
Family
ID=70550520
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020150180A Active JP7687768B2 (ja) | 2020-01-14 | 2020-09-07 | 不揮発性メモリの自動インクリメント書き込みカウント |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US11200113B2 (enExample) |
| EP (1) | EP3852109B1 (enExample) |
| JP (1) | JP7687768B2 (enExample) |
| KR (1) | KR20210091647A (enExample) |
| CN (1) | CN113129949A (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7401193B2 (ja) * | 2019-04-17 | 2023-12-19 | キヤノン株式会社 | 情報処理装置及びその制御方法並びにプログラム |
| US11403195B2 (en) * | 2019-08-07 | 2022-08-02 | Micron Technology, Inc. | Application of dynamic trim strategy in a die-protection memory sub-system |
| US11561729B2 (en) | 2020-08-19 | 2023-01-24 | Micron Technology, Inc. | Write determination counter |
| US11373705B2 (en) * | 2020-11-23 | 2022-06-28 | Micron Technology, Inc. | Dynamically boosting read voltage for a memory device |
| US11971815B2 (en) * | 2021-08-31 | 2024-04-30 | Micron Technology, Inc. | Write budget control of time-shift buffer for streaming devices |
| WO2024227267A1 (en) * | 2023-04-29 | 2024-11-07 | Yangtze Memory Technologies Co., Ltd. | Memory controller and memory system performing write disturbance management |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005128817A (ja) | 2003-10-24 | 2005-05-19 | Hitachi Ltd | 情報記憶装置及び情報処理システム |
| JP2007517320A (ja) | 2003-12-30 | 2007-06-28 | サンディスク コーポレイション | ホストの使用特性に基づいたフラッシュメモリのアドレスマッピングの適応的モード切り換え |
| JP2012027649A (ja) | 2010-07-22 | 2012-02-09 | Toshiba Corp | データ記憶装置及びデータ読み出し方法 |
| JP2013246533A (ja) | 2012-05-24 | 2013-12-09 | Sony Corp | 電子機器、メモリ管理システムおよびメモリ管理方法 |
| JP2016133874A (ja) | 2015-01-16 | 2016-07-25 | ルネサスエレクトロニクス株式会社 | 情報処理装置及びフラッシュメモリ制御方法 |
| JP2017504920A (ja) | 2013-12-30 | 2017-02-09 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | 不揮発性メモリ・アレイを含むデータ・ストレージ・システムを動作させるための方法、システム及びコンピュータ・プログラム |
| JP2017157214A (ja) | 2016-03-03 | 2017-09-07 | 三星電子株式会社Samsung Electronics Co.,Ltd. | インモジュール機能を遂行するメモリモジュール |
| JP2018120346A (ja) | 2017-01-24 | 2018-08-02 | 日本電気株式会社 | 情報処理システムおよび情報処理システムの制御方法 |
| JP2019106174A (ja) | 2017-12-14 | 2019-06-27 | インテル・コーポレーション | 記憶デバイスにおけるシステムタイムスタンプを用いたバックグラウンドデータ・リフレッシュ |
| WO2019203995A1 (en) | 2018-04-20 | 2019-10-24 | Micron Technology, Inc. | Apparatuses and methods for counter update operations |
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| US9153337B2 (en) | 2006-12-11 | 2015-10-06 | Marvell World Trade Ltd. | Fatigue management system and method for hybrid nonvolatile solid state memory system |
| KR101411499B1 (ko) * | 2008-05-19 | 2014-07-01 | 삼성전자주식회사 | 가변 저항 메모리 장치 및 그것의 관리 방법 |
| US7830726B2 (en) | 2008-09-30 | 2010-11-09 | Seagate Technology Llc | Data storage using read-mask-write operation |
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| KR20140008702A (ko) | 2012-07-11 | 2014-01-22 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 쓰기 방법 |
| US9424946B2 (en) * | 2013-02-08 | 2016-08-23 | Seagate Technology Llc | Non-volatile buffering to enable sloppy writes and fast write verification |
| KR102244618B1 (ko) * | 2014-02-21 | 2021-04-26 | 삼성전자 주식회사 | 플래시 메모리 시스템 및 플래시 메모리 시스템의 제어 방법 |
| US10127964B2 (en) * | 2014-07-03 | 2018-11-13 | Yale University | Circuitry for ferroelectric FET-based dynamic random access memory and non-volatile memory |
| US9524790B1 (en) * | 2015-08-02 | 2016-12-20 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Flash memory cells wear reduction |
| US10019198B2 (en) | 2016-04-01 | 2018-07-10 | Intel Corporation | Method and apparatus for processing sequential writes to portions of an addressable unit |
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| TW202001565A (zh) * | 2018-06-21 | 2020-01-01 | 慧榮科技股份有限公司 | 管理快閃記憶體模組的方法及相關的快閃記憶體控制器及電子裝置 |
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-
2020
- 2020-01-14 US US16/742,332 patent/US11200113B2/en active Active
- 2020-09-07 JP JP2020150180A patent/JP7687768B2/ja active Active
- 2020-09-15 KR KR1020200118221A patent/KR20210091647A/ko active Pending
- 2020-09-21 CN CN202010997363.2A patent/CN113129949A/zh active Pending
- 2020-09-22 EP EP20197332.8A patent/EP3852109B1/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005128817A (ja) | 2003-10-24 | 2005-05-19 | Hitachi Ltd | 情報記憶装置及び情報処理システム |
| JP2007517320A (ja) | 2003-12-30 | 2007-06-28 | サンディスク コーポレイション | ホストの使用特性に基づいたフラッシュメモリのアドレスマッピングの適応的モード切り換え |
| JP2012027649A (ja) | 2010-07-22 | 2012-02-09 | Toshiba Corp | データ記憶装置及びデータ読み出し方法 |
| JP2013246533A (ja) | 2012-05-24 | 2013-12-09 | Sony Corp | 電子機器、メモリ管理システムおよびメモリ管理方法 |
| JP2017504920A (ja) | 2013-12-30 | 2017-02-09 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | 不揮発性メモリ・アレイを含むデータ・ストレージ・システムを動作させるための方法、システム及びコンピュータ・プログラム |
| JP2016133874A (ja) | 2015-01-16 | 2016-07-25 | ルネサスエレクトロニクス株式会社 | 情報処理装置及びフラッシュメモリ制御方法 |
| JP2017157214A (ja) | 2016-03-03 | 2017-09-07 | 三星電子株式会社Samsung Electronics Co.,Ltd. | インモジュール機能を遂行するメモリモジュール |
| JP2018120346A (ja) | 2017-01-24 | 2018-08-02 | 日本電気株式会社 | 情報処理システムおよび情報処理システムの制御方法 |
| JP2019106174A (ja) | 2017-12-14 | 2019-06-27 | インテル・コーポレーション | 記憶デバイスにおけるシステムタイムスタンプを用いたバックグラウンドデータ・リフレッシュ |
| WO2019203995A1 (en) | 2018-04-20 | 2019-10-24 | Micron Technology, Inc. | Apparatuses and methods for counter update operations |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113129949A (zh) | 2021-07-16 |
| EP3852109A1 (en) | 2021-07-21 |
| US20200151052A1 (en) | 2020-05-14 |
| US11200113B2 (en) | 2021-12-14 |
| JP2021111333A (ja) | 2021-08-02 |
| KR20210091647A (ko) | 2021-07-22 |
| EP3852109B1 (en) | 2025-04-30 |
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