JP7365528B2 - 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法 - Google Patents

接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法 Download PDF

Info

Publication number
JP7365528B2
JP7365528B2 JP2023506314A JP2023506314A JP7365528B2 JP 7365528 B2 JP7365528 B2 JP 7365528B2 JP 2023506314 A JP2023506314 A JP 2023506314A JP 2023506314 A JP2023506314 A JP 2023506314A JP 7365528 B2 JP7365528 B2 JP 7365528B2
Authority
JP
Japan
Prior art keywords
identification mark
conductor
dummy
circuit board
bonded substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2023506314A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2023008200A5 (https=
JPWO2023008200A1 (https=
Inventor
晃正 湯浅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denka Co Ltd
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denka Co Ltd, Denki Kagaku Kogyo KK filed Critical Denka Co Ltd
Publication of JPWO2023008200A1 publication Critical patent/JPWO2023008200A1/ja
Publication of JPWO2023008200A5 publication Critical patent/JPWO2023008200A5/ja
Application granted granted Critical
Publication of JP7365528B2 publication Critical patent/JP7365528B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
JP2023506314A 2021-07-26 2022-07-13 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法 Active JP7365528B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021121333 2021-07-26
JP2021121333 2021-07-26
PCT/JP2022/027620 WO2023008200A1 (ja) 2021-07-26 2022-07-13 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法

Publications (3)

Publication Number Publication Date
JPWO2023008200A1 JPWO2023008200A1 (https=) 2023-02-02
JPWO2023008200A5 JPWO2023008200A5 (https=) 2023-07-05
JP7365528B2 true JP7365528B2 (ja) 2023-10-19

Family

ID=85086705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023506314A Active JP7365528B2 (ja) 2021-07-26 2022-07-13 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法

Country Status (4)

Country Link
EP (1) EP4369874A4 (https=)
JP (1) JP7365528B2 (https=)
CN (1) CN117694024A (https=)
WO (1) WO2023008200A1 (https=)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042934A (ja) 2005-08-04 2007-02-15 Juki Corp 多面取り基板の生産履歴管理方法及び多面取り基板
JP2011165727A (ja) 2010-02-05 2011-08-25 Mitsubishi Materials Corp パワーモジュール用基板の製造方法およびパワーモジュール用基板の製造中間体
JP2011233648A (ja) 2010-04-26 2011-11-17 Murata Mfg Co Ltd マーク付き回路基板
WO2021020471A1 (ja) 2019-07-31 2021-02-04 デンカ株式会社 セラミックス基板及びその製造方法、複合基板及びその製造方法、並びに、回路基板及びその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005210028A (ja) 2004-01-26 2005-08-04 Kyocera Corp 多数個取り配線基板
JP2013247256A (ja) * 2012-05-28 2013-12-09 Hitachi Ltd 半導体装置およびその製造方法
BE1023850B1 (nl) * 2016-06-29 2017-08-14 C-Mac Electromag Bvba Verbeterde elektronische schakeling en substraat met identificatiepatroon voor afzonderlijke elektronische schakelingen en werkwijze voor het produceren daarvan
CN113490654A (zh) 2019-03-01 2021-10-08 电化株式会社 陶瓷生片、陶瓷基板、陶瓷生片的制造方法及陶瓷基板的制造方法
WO2021054317A1 (ja) * 2019-09-20 2021-03-25 デンカ株式会社 複合基板及びその製造方法、並びに、回路基板及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042934A (ja) 2005-08-04 2007-02-15 Juki Corp 多面取り基板の生産履歴管理方法及び多面取り基板
JP2011165727A (ja) 2010-02-05 2011-08-25 Mitsubishi Materials Corp パワーモジュール用基板の製造方法およびパワーモジュール用基板の製造中間体
JP2011233648A (ja) 2010-04-26 2011-11-17 Murata Mfg Co Ltd マーク付き回路基板
WO2021020471A1 (ja) 2019-07-31 2021-02-04 デンカ株式会社 セラミックス基板及びその製造方法、複合基板及びその製造方法、並びに、回路基板及びその製造方法

Also Published As

Publication number Publication date
CN117694024A (zh) 2024-03-12
WO2023008200A1 (ja) 2023-02-02
EP4369874A1 (en) 2024-05-15
EP4369874A4 (en) 2024-11-06
JPWO2023008200A1 (https=) 2023-02-02

Similar Documents

Publication Publication Date Title
JP7465879B2 (ja) セラミックス基板及びその製造方法、複合基板及びその製造方法、並びに、回路基板及びその製造方法
CN106910417B (zh) 用于对金属-陶瓷基底进行单独编码的方法
CN101277592B (zh) 布线基板的制造方法
JP7365529B2 (ja) 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法
JP7270525B2 (ja) 複合基板及びその製造方法、並びに、回路基板の製造方法
JP7503069B2 (ja) 複合基板及びその製造方法、並びに、回路基板及びその製造方法
JP7365528B2 (ja) 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法
JP2005123288A (ja) 積層電子部品の製造方法
CN102568825B (zh) 陶瓷电子部件的制造方法、位置测定装置和方法、标记形成装置和方法
TWI578348B (zh) Method for manufacturing ceramic electronic parts, position measuring apparatus and method, and marking forming apparatus and method
CA2680247C (en) Integrated circuit package, notably for image sensor, and method of positioning
JP3254361B2 (ja) フレキシブルプリント配線基板の製造方法
JP2005347642A (ja) 積層セラミック電子部品の製造方法
JP2007165540A (ja) 多層セラミック基板の製造方法及び多層セラミック集合基板
JP2025136610A (ja) 接合基板、及び接合基板の製造方法
JP7695850B2 (ja) セラミック複合基板、及びセラミック複合基板の製造方法
JP2009114009A (ja) 積層セラミックス基板の製造方法
JP7580188B2 (ja) 窒化珪素セラミックス焼結基板の製造方法及び回路基板の製造方法
JP2021048165A (ja) 回路基板の製造方法
JP2002223072A (ja) 多層プリント配線板の製造方法およびその製造装置
WO2023190246A1 (ja) 回路基板及びその製造方法、並びにパワーモジュール
WO2023190255A1 (ja) 回路基板及びその製造方法、並びにパワーモジュール
CN120857382A (zh) 一种盲槽电路板的制作方法
CN120912217A (zh) 一种封装产品全流程追溯方法及系统
JPS612384A (ja) セラミツク多層配線基板の製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230130

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230130

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20230130

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230509

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230623

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230919

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20231006

R150 Certificate of patent or registration of utility model

Ref document number: 7365528

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150