JP7256675B2 - 低誘電膜の形成方法及び半導体素子の形成方法 - Google Patents

低誘電膜の形成方法及び半導体素子の形成方法 Download PDF

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JP7256675B2
JP7256675B2 JP2019078428A JP2019078428A JP7256675B2 JP 7256675 B2 JP7256675 B2 JP 7256675B2 JP 2019078428 A JP2019078428 A JP 2019078428A JP 2019078428 A JP2019078428 A JP 2019078428A JP 7256675 B2 JP7256675 B2 JP 7256675B2
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source
supplying
forming
cycles
low dielectric
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JP2019192907A5 (enExample
JP2019192907A (ja
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善英 李
▲みん▼材 康
▲せ▼娟 金
台原 金
容▲そく▼ 卓
善政 金
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Samsung Electronics Co Ltd
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