JP6934823B2 - 3レベルiタイプインバータおよび半導体モジュール - Google Patents
3レベルiタイプインバータおよび半導体モジュール Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 21
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 12
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 12
- 230000004888 barrier function Effects 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 5
- 239000004020 conductor Substances 0.000 description 32
- 238000010586 diagram Methods 0.000 description 20
- 230000017525 heat dissipation Effects 0.000 description 8
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- 102100026533 Cytochrome P450 1A2 Human genes 0.000 description 5
- 101000855342 Homo sapiens Cytochrome P450 1A2 Proteins 0.000 description 5
- 238000011084 recovery Methods 0.000 description 5
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- 101000941690 Homo sapiens Cytochrome P450 1A1 Proteins 0.000 description 4
- 230000001965 increasing effect Effects 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
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- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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Description
<装置構成>
図1は本発明に係る実施の形態1の3レベルIタイプインバータのハーフブリッジ回路90を示す回路図である。
ここで、RC−IGBTであるトランジスタQ1およびQ2は、1つのチップにIGBTとダイオードとを作り込むため、IGBTおよびダイオードを別個のチップとする場合に比べて、総面積を小さくできる。すなわち、RC−IGBTは、単体のIGBTよりも平面視でのチップ面積を大きくしているが、単体のIGBTと単体のダイオードとのチップ面積の合計よりも、チップ面積は小さくなる。このため、トランジスタQ1およびQ2をRC−IGBTとすることで、半導体モジュール全体の面積を小さくできる。
図16は、2相の3レベルIタイプインバータに本実施の形態を適用した場合の回路図である。なお、図5を用いて説明した2相の3レベルIタイプインバータと同一の構成については同一の符号を付し、重複する説明は省略する。
図17は、3相の3レベルIタイプインバータに本実施の形態を適用した場合の回路図である。なお、図16を用いて説明した2相の3レベルIタイプインバータと同一の構成については同一の符号を付し、重複する説明は省略する。
図18は本発明に係る実施の形態2の3レベルIタイプインバータのハーフブリッジ回路90Aを示す回路図である。
Claims (5)
- 第1の電位が与えられる第1の主電源ノードと、前記第1の電位よりも低い第2の電位が与えられる第2の主電源ノードとの間に、前記第1の電位側から順に直列に接続された、第1、第2、第3および第4のスイッチングデバイスと、
前記第1〜第4のスイッチングデバイスに、それぞれ逆並列に接続された、第1、第2、第3および第4のダイオードと、
前記第1および第2のスイッチングデバイスの接続ノードと、前記第3および第4のスイッチングデバイスの接続ノードとの間に、前記第2および第3のスイッチングデバイスの直列接続に対して逆並列に直列接続された第5および第6のダイオードと、を備え、
前記第5および第6のダイオードの接続ノードは、前記第1の電位と前記第2の電位との中間電位が与えられる入力ノードに接続され、
前記第2および第3のスイッチングデバイスの接続ノードは出力ノードに接続され、
前記第2のスイッチングデバイスおよび前記第2のダイオードは、第1の逆導通IGBTに含まれるIGBTおよびダイオードで構成され、
前記第3のスイッチングデバイスおよび前記第3のダイオードは、第2の逆導通IGBTに含まれるIGBTおよびダイオードで構成される、3レベルIタイプインバータ。 - 前記第1のスイッチングデバイスは、IGBTであって、
前記第1の逆導通IGBTのチップ面積は、前記第1のスイッチングデバイスのチップ面積よりも大きく、
前記第4のスイッチングデバイスは、IGBTであって、
前記第2の逆導通IGBTのチップ面積は、前記第4のスイッチングデバイスのチップ面積よりも大きい、請求項1記載の3レベルIタイプインバータ。 - 前記第1および第4のスイッチングデバイスは、シリコンカーバイドを半導体材料とするMOSトランジスタで構成し、
前記第1、第4、第5および第6のダイオードは、シリコンカーバイドを半導体材料とするショットキーバリアダイオードで構成する、請求項1記載の3レベルIタイプインバータ。 - 前記第1の逆導通IGBTのチップ面積は、前記第1のスイッチングデバイスのチップ面積よりも大きく、
前記第2の逆導通IGBTのチップ面積は、前記第4のスイッチングデバイスのチップ面積よりも大きい、請求項3記載の3レベルIタイプインバータ。 - 請求項1記載の3レベルIタイプインバータが1つのパッケージ内に収納された半導体モジュールであって、
前記第1の主電源ノード、前記第2の主電源ノード、前記入力ノードおよび前記出力ノードは、前記パッケージの中央部に一列に配置される、半導体モジュール。
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JP2018033003A JP6934823B2 (ja) | 2018-02-27 | 2018-02-27 | 3レベルiタイプインバータおよび半導体モジュール |
US16/184,254 US10541624B2 (en) | 2018-02-27 | 2018-11-08 | Three-level I-type inverter and semiconductor module |
DE102019201726.6A DE102019201726A1 (de) | 2018-02-27 | 2019-02-11 | Inverter vom I-Typ mit drei Niveaus und Halbleitermodul |
CN201910139296.8A CN110198128B (zh) | 2018-02-27 | 2019-02-22 | 3电平i型逆变器及半导体模块 |
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CN212324008U (zh) * | 2020-04-20 | 2021-01-08 | 阳光电源股份有限公司 | 一种逆变器及其功率单元和功率模块 |
JP7522292B2 (ja) * | 2020-07-03 | 2024-07-24 | エルエス、エレクトリック、カンパニー、リミテッド | 電力変換装置及びその制御方法 |
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JP2003070262A (ja) | 2001-08-23 | 2003-03-07 | Toshiba Corp | 電力変換装置 |
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