JP6914245B2 - 複数のダイを含むパッケージオンパッケージ(pop)構造 - Google Patents

複数のダイを含むパッケージオンパッケージ(pop)構造 Download PDF

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JP6914245B2
JP6914245B2 JP2018503557A JP2018503557A JP6914245B2 JP 6914245 B2 JP6914245 B2 JP 6914245B2 JP 2018503557 A JP2018503557 A JP 2018503557A JP 2018503557 A JP2018503557 A JP 2018503557A JP 6914245 B2 JP6914245 B2 JP 6914245B2
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die
layer
conductive path
pid
conductive
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JP2018523919A (ja
JP2018523919A5 (enExample
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ホン・ボク・ウィ
ジェ・シク・イ
ドン・ウク・キム
シチュン・グ
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クアルコム,インコーポレイテッド
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L2224/732Location after the connecting process
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Packaging Frangible Articles (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Die Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Geometry (AREA)
  • Medical Preparation Storing Or Oral Administration Devices (AREA)
  • Packages (AREA)
  • Hybrid Cells (AREA)
  • Optical Measuring Cells (AREA)
  • Measurement Of Radiation (AREA)
JP2018503557A 2015-07-29 2016-07-28 複数のダイを含むパッケージオンパッケージ(pop)構造 Active JP6914245B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/812,476 US9401350B1 (en) 2015-07-29 2015-07-29 Package-on-package (POP) structure including multiple dies
US14/812,476 2015-07-29
PCT/US2016/044487 WO2017019866A1 (en) 2015-07-29 2016-07-28 Package-on-package (pop) structure including multiple dies

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Publication Number Publication Date
JP2018523919A JP2018523919A (ja) 2018-08-23
JP2018523919A5 JP2018523919A5 (enExample) 2019-08-15
JP6914245B2 true JP6914245B2 (ja) 2021-08-04

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US (1) US9401350B1 (enExample)
EP (2) EP4439634A3 (enExample)
JP (1) JP6914245B2 (enExample)
KR (1) KR102546223B1 (enExample)
CN (1) CN107851588B (enExample)
BR (1) BR112018001783B8 (enExample)
CA (1) CA2990470A1 (enExample)
WO (1) WO2017019866A1 (enExample)

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WO2020103147A1 (zh) * 2018-11-23 2020-05-28 北京比特大陆科技有限公司 芯片散热结构、芯片结构、电路板和超算设备
EP3723459A1 (en) 2019-04-10 2020-10-14 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with high passive intermodulation (pim) performance
EP3980473B1 (en) 2019-06-05 2024-08-07 Borealis AG Multilayer polyproplyene film
KR102764370B1 (ko) 2019-12-26 2025-02-07 삼성전자주식회사 반도체 패키지
CN112867243A (zh) * 2021-01-06 2021-05-28 英韧科技(上海)有限公司 多层电路板
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CN107851588B (zh) 2020-10-16
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EP4439634A3 (en) 2025-01-15
EP3329512A1 (en) 2018-06-06
KR102546223B1 (ko) 2023-06-20
CA2990470A1 (en) 2017-02-02
BR112018001783B8 (pt) 2023-02-14
WO2017019866A1 (en) 2017-02-02
BR112018001783B1 (pt) 2023-01-31
EP4439634A2 (en) 2024-10-02
CN107851588A (zh) 2018-03-27
US9401350B1 (en) 2016-07-26
BR112018001783A2 (pt) 2018-09-11

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