JP6828959B2 - リードフレームおよびその製造方法 - Google Patents

リードフレームおよびその製造方法 Download PDF

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Publication number
JP6828959B2
JP6828959B2 JP2017006178A JP2017006178A JP6828959B2 JP 6828959 B2 JP6828959 B2 JP 6828959B2 JP 2017006178 A JP2017006178 A JP 2017006178A JP 2017006178 A JP2017006178 A JP 2017006178A JP 6828959 B2 JP6828959 B2 JP 6828959B2
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JP
Japan
Prior art keywords
recess
lead frame
shape
etching
plating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017006178A
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English (en)
Japanese (ja)
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JP2018117020A (ja
JP2018117020A5 (https=
Inventor
柾樹 山口
柾樹 山口
Original Assignee
大口マテリアル株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 大口マテリアル株式会社 filed Critical 大口マテリアル株式会社
Priority to JP2017006178A priority Critical patent/JP6828959B2/ja
Priority to TW107100604A priority patent/TW201841323A/zh
Priority to CN201810044232.5A priority patent/CN108461469A/zh
Priority to US15/873,226 priority patent/US10622286B2/en
Publication of JP2018117020A publication Critical patent/JP2018117020A/ja
Publication of JP2018117020A5 publication Critical patent/JP2018117020A5/ja
Application granted granted Critical
Publication of JP6828959B2 publication Critical patent/JP6828959B2/ja
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Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H10W70/427—Bent parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/042—Etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/325—Die-attach connectors having a filler embedded in a matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP2017006178A 2017-01-17 2017-01-17 リードフレームおよびその製造方法 Active JP6828959B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2017006178A JP6828959B2 (ja) 2017-01-17 2017-01-17 リードフレームおよびその製造方法
TW107100604A TW201841323A (zh) 2017-01-17 2018-01-08 導線框及其製造方法
CN201810044232.5A CN108461469A (zh) 2017-01-17 2018-01-17 引线框及其制造方法
US15/873,226 US10622286B2 (en) 2017-01-17 2018-01-17 Lead frame and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017006178A JP6828959B2 (ja) 2017-01-17 2017-01-17 リードフレームおよびその製造方法

Publications (3)

Publication Number Publication Date
JP2018117020A JP2018117020A (ja) 2018-07-26
JP2018117020A5 JP2018117020A5 (https=) 2019-09-05
JP6828959B2 true JP6828959B2 (ja) 2021-02-10

Family

ID=62841139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017006178A Active JP6828959B2 (ja) 2017-01-17 2017-01-17 リードフレームおよびその製造方法

Country Status (4)

Country Link
US (1) US10622286B2 (https=)
JP (1) JP6828959B2 (https=)
CN (1) CN108461469A (https=)
TW (1) TW201841323A (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6741356B1 (ja) * 2019-03-22 2020-08-19 大口マテリアル株式会社 リードフレーム
EP3879569A1 (en) * 2020-03-11 2021-09-15 Nexperia B.V. A leadless semiconductor package and method of manufacture
JP7617812B2 (ja) 2021-05-24 2025-01-20 新光電気工業株式会社 リードフレーム、半導体装置及びリードフレームの製造方法
JP7677579B2 (ja) * 2021-12-22 2025-05-15 新光電気工業株式会社 リードフレーム、リードフレームの製造方法及び半導体装置の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52122960A (en) 1976-04-07 1977-10-15 Shionogi Seiyaku Kk Freeze drying method and apparatus
JP3780122B2 (ja) 1999-07-07 2006-05-31 株式会社三井ハイテック 半導体装置の製造方法
US20040080025A1 (en) * 2002-09-17 2004-04-29 Shinko Electric Industries Co., Ltd. Lead frame, method of manufacturing the same, and semiconductor device manufactured with the same
JP2007051336A (ja) * 2005-08-18 2007-03-01 Shinko Electric Ind Co Ltd 金属板パターン及び回路基板の形成方法
JP2009164232A (ja) 2007-12-28 2009-07-23 Mitsui High Tec Inc 半導体装置及びその製造方法並びにリードフレーム及びその製造方法
US7821113B2 (en) * 2008-06-03 2010-10-26 Texas Instruments Incorporated Leadframe having delamination resistant die pad
JP2009302209A (ja) * 2008-06-11 2009-12-24 Nec Electronics Corp リードフレーム、半導体装置、リードフレームの製造方法および半導体装置の製造方法
WO2010052973A1 (ja) * 2008-11-05 2010-05-14 株式会社三井ハイテック 半導体装置及びその製造方法
JP5195647B2 (ja) * 2009-06-01 2013-05-08 セイコーエプソン株式会社 リードフレームの製造方法及び半導体装置の製造方法
JP5626785B2 (ja) 2010-09-27 2014-11-19 Ｓｈマテリアル株式会社 半導体素子搭載用リードフレームおよびその製造方法
JP2012146782A (ja) 2011-01-11 2012-08-02 Sumitomo Metal Mining Co Ltd 半導体素子搭載用リードフレームの製造方法
JP2017103365A (ja) * 2015-12-02 2017-06-08 新光電気工業株式会社 リードフレーム及び電子部品装置とそれらの製造方法

Also Published As

Publication number Publication date
JP2018117020A (ja) 2018-07-26
CN108461469A (zh) 2018-08-28
TW201841323A (zh) 2018-11-16
US20180204787A1 (en) 2018-07-19
US10622286B2 (en) 2020-04-14

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