JP6689691B2 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP6689691B2
JP6689691B2 JP2016137740A JP2016137740A JP6689691B2 JP 6689691 B2 JP6689691 B2 JP 6689691B2 JP 2016137740 A JP2016137740 A JP 2016137740A JP 2016137740 A JP2016137740 A JP 2016137740A JP 6689691 B2 JP6689691 B2 JP 6689691B2
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JP
Japan
Prior art keywords
layer
wiring
wiring board
insulating layer
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016137740A
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English (en)
Japanese (ja)
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JP2018010931A (ja
JP2018010931A5 (enExample
Inventor
豊明 酒井
豊明 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2016137740A priority Critical patent/JP6689691B2/ja
Priority to US15/645,017 priority patent/US10170405B2/en
Publication of JP2018010931A publication Critical patent/JP2018010931A/ja
Publication of JP2018010931A5 publication Critical patent/JP2018010931A5/ja
Application granted granted Critical
Publication of JP6689691B2 publication Critical patent/JP6689691B2/ja
Active legal-status Critical Current
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Classifications

    • H10W70/635—
    • H10W90/00—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H10P72/74—
    • H10W70/60—
    • H10W70/68—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09863—Concave hole or via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2072—Anchoring, i.e. one structure gripping into another
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H10P72/7424—
    • H10P72/743—
    • H10W72/0198—
    • H10W72/072—
    • H10W72/07207—
    • H10W72/07236—
    • H10W72/073—
    • H10W72/07307—
    • H10W72/225—
    • H10W72/252—
    • H10W72/253—
    • H10W72/325—
    • H10W72/354—
    • H10W74/00—
    • H10W74/15—
    • H10W90/701—
    • H10W90/724—
    • H10W90/734—
    • H10W99/00—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2016137740A 2016-07-12 2016-07-12 配線基板及びその製造方法 Active JP6689691B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2016137740A JP6689691B2 (ja) 2016-07-12 2016-07-12 配線基板及びその製造方法
US15/645,017 US10170405B2 (en) 2016-07-12 2017-07-10 Wiring substrate and semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016137740A JP6689691B2 (ja) 2016-07-12 2016-07-12 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2018010931A JP2018010931A (ja) 2018-01-18
JP2018010931A5 JP2018010931A5 (enExample) 2019-04-04
JP6689691B2 true JP6689691B2 (ja) 2020-04-28

Family

ID=60940698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016137740A Active JP6689691B2 (ja) 2016-07-12 2016-07-12 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US10170405B2 (enExample)
JP (1) JP6689691B2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020100947A1 (ja) * 2018-11-15 2020-05-22 ローム株式会社 半導体装置
KR102698875B1 (ko) * 2018-12-13 2024-08-27 엘지이노텍 주식회사 인쇄회로기판
KR20210154450A (ko) * 2020-06-12 2021-12-21 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811081A (en) * 1987-03-23 1989-03-07 Motorola, Inc. Semiconductor die bonding with conductive adhesive
JP2641869B2 (ja) * 1987-07-24 1997-08-20 三菱電機株式会社 半導体装置の製造方法
EP0489177A4 (en) * 1990-06-26 1993-06-09 Seiko Epson Corporation Semiconductor device and method of manufacturing the same
US5678301A (en) * 1991-06-04 1997-10-21 Micron Technology, Inc. Method for forming an interconnect for testing unpackaged semiconductor dice
US5602419A (en) * 1993-12-16 1997-02-11 Nec Corporation Chip carrier semiconductor device assembly
JPH08236586A (ja) * 1994-12-29 1996-09-13 Nitto Denko Corp 半導体装置及びその製造方法
JPH08288424A (ja) * 1995-04-18 1996-11-01 Nec Corp 半導体装置
US6114763A (en) * 1997-05-30 2000-09-05 Tessera, Inc. Semiconductor package with translator for connection to an external substrate
US6140707A (en) * 1998-05-07 2000-10-31 3M Innovative Properties Co. Laminated integrated circuit package
US6100112A (en) * 1998-05-28 2000-08-08 The Furukawa Electric Co., Ltd. Method of manufacturing a tape carrier with bump
JP3843919B2 (ja) * 2002-09-09 2006-11-08 株式会社デンソー 半導体ウェハのめっき方法
JP4108643B2 (ja) * 2004-05-12 2008-06-25 日本電気株式会社 配線基板及びそれを用いた半導体パッケージ
JP5003812B2 (ja) 2009-12-10 2012-08-15 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
JP6133227B2 (ja) * 2014-03-27 2017-05-24 新光電気工業株式会社 配線基板及びその製造方法
JP2016122808A (ja) * 2014-12-25 2016-07-07 Ｓｈマテリアル株式会社 半導体装置用基板及びその製造方法

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US20180019196A1 (en) 2018-01-18
JP2018010931A (ja) 2018-01-18
US10170405B2 (en) 2019-01-01

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