JP6652245B2 - コバルトベースの複数のインターコネクトおよびそれらの複数の製造方法 - Google Patents

コバルトベースの複数のインターコネクトおよびそれらの複数の製造方法 Download PDF

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JP6652245B2
JP6652245B2 JP2016526908A JP2016526908A JP6652245B2 JP 6652245 B2 JP6652245 B2 JP 6652245B2 JP 2016526908 A JP2016526908 A JP 2016526908A JP 2016526908 A JP2016526908 A JP 2016526908A JP 6652245 B2 JP6652245 B2 JP 6652245B2
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cobalt
adhesive layer
manganese
structure according
layer
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JP2016541113A5 (enExample
JP2016541113A (ja
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ジェゼウスキ、クリストファー、ジェイ.
インドゥクリ、タジャスウィ、ケイ.
チェビアム、ラマナン、ヴィ.
カーヴァー、コリン、ティー.
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Intel Corp
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Intel Corp
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    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2016526908A 2013-12-20 2015-02-21 コバルトベースの複数のインターコネクトおよびそれらの複数の製造方法 Active JP6652245B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/137,526 US9997457B2 (en) 2013-12-20 2013-12-20 Cobalt based interconnects and methods of fabrication thereof
US14/137,526 2013-12-20
PCT/IB2015/000198 WO2015092780A1 (en) 2013-12-20 2015-02-21 Cobalt based interconnects and methods of fabrication thereof

Publications (3)

Publication Number Publication Date
JP2016541113A JP2016541113A (ja) 2016-12-28
JP2016541113A5 JP2016541113A5 (enExample) 2018-05-24
JP6652245B2 true JP6652245B2 (ja) 2020-02-19

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JP2016526908A Active JP6652245B2 (ja) 2013-12-20 2015-02-21 コバルトベースの複数のインターコネクトおよびそれらの複数の製造方法

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Country Link
US (5) US9997457B2 (enExample)
EP (2) EP3084810B1 (enExample)
JP (1) JP6652245B2 (enExample)
KR (3) KR102710883B1 (enExample)
CN (2) CN114361132B (enExample)
TW (1) TWI610398B (enExample)
WO (1) WO2015092780A1 (enExample)

Families Citing this family (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9997457B2 (en) * 2013-12-20 2018-06-12 Intel Corporation Cobalt based interconnects and methods of fabrication thereof
US9847289B2 (en) * 2014-05-30 2017-12-19 Applied Materials, Inc. Protective via cap for improved interconnect performance
KR102369142B1 (ko) * 2014-06-16 2022-03-02 인텔 코포레이션 금속 인터커넥트의 시임 치유
US9601430B2 (en) * 2014-10-02 2017-03-21 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and method for forming the same
US20160276156A1 (en) * 2015-03-16 2016-09-22 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing process thereof
WO2017039628A1 (en) * 2015-08-31 2017-03-09 Daniel Sobieski Inorganic interposer for multi-chip packaging
US9722038B2 (en) * 2015-09-11 2017-08-01 International Business Machines Corporation Metal cap protection layer for gate and contact metallization
US9484255B1 (en) * 2015-11-03 2016-11-01 International Business Machines Corporation Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts
US9741577B2 (en) 2015-12-02 2017-08-22 International Business Machines Corporation Metal reflow for middle of line contacts
TWI637899B (zh) * 2015-12-15 2018-10-11 村田製作所股份有限公司 微機電裝置和製造其之方法
US10446496B2 (en) 2016-02-17 2019-10-15 International Business Machines Corporation Self-forming barrier for cobalt interconnects
US9837350B2 (en) 2016-04-12 2017-12-05 International Business Machines Corporation Semiconductor interconnect structure with double conductors
US10438849B2 (en) * 2016-04-25 2019-10-08 Applied Materials, Inc. Microwave anneal to improve CVD metal gap-fill and throughput
US10438847B2 (en) * 2016-05-13 2019-10-08 Lam Research Corporation Manganese barrier and adhesion layers for cobalt
US9799555B1 (en) * 2016-06-07 2017-10-24 Globalfoundries Inc. Cobalt interconnects covered by a metal cap
US10049927B2 (en) * 2016-06-10 2018-08-14 Applied Materials, Inc. Seam-healing method upon supra-atmospheric process in diffusion promoting ambient
US10079208B2 (en) * 2016-07-28 2018-09-18 Globalfoundries Inc. IC structure with interface liner and methods of forming same
US9953864B2 (en) 2016-08-30 2018-04-24 International Business Machines Corporation Interconnect structure
US10049974B2 (en) * 2016-08-30 2018-08-14 International Business Machines Corporation Metal silicate spacers for fully aligned vias
JP6559107B2 (ja) * 2016-09-09 2019-08-14 東京エレクトロン株式会社 成膜方法および成膜システム
US9899317B1 (en) 2016-09-29 2018-02-20 International Business Machines Corporation Nitridization for semiconductor structures
US9741609B1 (en) 2016-11-01 2017-08-22 International Business Machines Corporation Middle of line cobalt interconnection
KR102777131B1 (ko) * 2016-12-14 2025-03-05 삼성전자주식회사 반도체 장치
US10128151B2 (en) 2016-12-16 2018-11-13 Globalfoundries Inc. Devices and methods of cobalt fill metallization
WO2018125175A1 (en) * 2016-12-30 2018-07-05 Intel Corporation Self-aligned hard masks with converted liners
US10177030B2 (en) * 2017-01-11 2019-01-08 International Business Machines Corporation Cobalt contact and interconnect structures
US9805972B1 (en) * 2017-02-20 2017-10-31 Globalfoundries Inc. Skip via structures
KR102292645B1 (ko) * 2017-03-09 2021-08-24 삼성전자주식회사 집적회로 소자
US10109490B1 (en) * 2017-06-20 2018-10-23 Globalfoundries Inc. Cobalt interconnects formed by selective bottom-up fill
US10553481B2 (en) 2017-08-31 2020-02-04 Taiwan Semiconductor Manufacturing Co., Ltd. Vias for cobalt-based interconnects and methods of fabrication thereof
US12087692B2 (en) * 2017-09-28 2024-09-10 Taiwan Semiconductor Manufacturing Co., Ltd. Hardened interlayer dielectric layer
US11348828B2 (en) * 2017-11-23 2022-05-31 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure and method of forming the same
US10541199B2 (en) 2017-11-29 2020-01-21 International Business Machines Corporation BEOL integration with advanced interconnects
US11411095B2 (en) * 2017-11-30 2022-08-09 Intel Corporation Epitaxial source or drain structures for advanced integrated circuit structure fabrication
DE102018124674B4 (de) 2017-11-30 2026-08-13 Taiwan Semiconductor Manufacturing Co., Ltd. Kontaktstifte für Halbleiter-Bauelement und Verfahren zu deren Herstellung
TWI915677B (zh) * 2017-11-30 2026-02-21 美商英特爾股份有限公司 用於先進積體電路結構製造之異質金屬線組成
US10847413B2 (en) 2017-11-30 2020-11-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming contact plugs for semiconductor device
US10340183B1 (en) * 2018-01-02 2019-07-02 Globalfoundries Inc. Cobalt plated via integration scheme
US20190363048A1 (en) * 2018-05-22 2019-11-28 Lam Research Corporation Via prefill in a fully aligned via
US11501999B2 (en) * 2018-09-28 2022-11-15 Taiwan Semiconductor Manufacturing Co., Ltd. Cobalt fill for gate structures
US10971398B2 (en) * 2018-10-26 2021-04-06 International Business Machines Corporation Cobalt interconnect structure including noble metal layer
CN111261574A (zh) * 2018-12-03 2020-06-09 长鑫存储技术有限公司 一种半导体结构及其制作方法
FR3092589A1 (fr) 2019-02-08 2020-08-14 Aveni Electrodéposition d’un alliage de cobalt et utilisation en microélectronique
US20220090283A1 (en) 2019-02-08 2022-03-24 Aveni Electrodeposition of a cobalt or copper alloy, and use in microelectronics
US10818589B2 (en) 2019-03-13 2020-10-27 International Business Machines Corporation Metal interconnect structures with self-forming sidewall barrier layer
US10803548B2 (en) * 2019-03-15 2020-10-13 Intel Corporation Disaggregation of SOC architecture
US11292938B2 (en) 2019-09-11 2022-04-05 Rohm And Haas Electronic Materials Cmp Holdings, Inc. Method of selective chemical mechanical polishing cobalt, zirconium oxide, poly-silicon and silicon dioxide films
US11189589B2 (en) * 2019-09-25 2021-11-30 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure with raised implanted region and manufacturing method thereof
US11152257B2 (en) * 2020-01-16 2021-10-19 International Business Machines Corporation Barrier-less prefilled via formation
KR20230108327A (ko) * 2020-12-10 2023-07-18 더 리전츠 오브 더 유니버시티 오브 캘리포니아 Cmos 호환가능 그래핀 구조, 인터커넥트 및 제조 방법
US11581258B2 (en) 2021-01-13 2023-02-14 Nanya Technology Corporation Semiconductor device structure with manganese-containing interconnect structure and method for forming the same
KR102876645B1 (ko) 2021-02-08 2025-10-28 맥더미드 엔쏜 인코포레이티드 확산 장벽 형성을 위한 방법 및 습식 화학 조성물
US12183631B2 (en) * 2021-07-02 2024-12-31 Applied Materials, Inc. Methods for copper doped hybrid metallization for line and via
US12315735B2 (en) 2021-07-31 2025-05-27 Applied Materials, Inc. Methods for removing etch stop layers
US11944013B2 (en) * 2021-09-17 2024-03-26 International Business Machines Corporation Magnetic tunnel junction device with minimum stray field
CN116936532A (zh) * 2022-04-08 2023-10-24 中芯国际集成电路制造(天津)有限公司 半导体结构及其形成方法
US20240047350A1 (en) * 2022-08-03 2024-02-08 Nanya Technology Corporation Metal structure having funnel-shaped interconnect and method of manufacturing the same
US12310084B2 (en) 2022-08-22 2025-05-20 Nanya Technology Corporation Semiconductor device with assistant cap and method for fabricating the same
KR20240105758A (ko) 2022-12-29 2024-07-08 삼성전자주식회사 반도체 장치
US20250236514A1 (en) * 2024-01-24 2025-07-24 Taiwan Semiconductor Manufacturing Company Ltd Chemical stop structures for mems devices
US20260096423A1 (en) * 2024-10-01 2026-04-02 Tokyo Electron Limited Methods for forming low-resistivity interconnect structures comprising ruthenium

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020019127A1 (en) * 1997-02-14 2002-02-14 Micron Technology, Inc. Interconnect structure and method of making
EP1627098A1 (de) * 2003-05-09 2006-02-22 Basf Aktiengesellschaft Zusammensetzungen zur stromlosen abscheidung tern rer materi alien f r die halbleiterindustrie
US7304388B2 (en) 2003-06-26 2007-12-04 Intel Corporation Method and apparatus for an improved air gap interconnect structure
US7972970B2 (en) * 2003-10-20 2011-07-05 Novellus Systems, Inc. Fabrication of semiconductor interconnect structure
US6967131B2 (en) * 2003-10-29 2005-11-22 International Business Machines Corp. Field effect transistor with electroplated metal gate
JP5096669B2 (ja) * 2005-07-06 2012-12-12 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP4197694B2 (ja) 2005-08-10 2008-12-17 株式会社東芝 半導体装置およびその製造方法
JP4529880B2 (ja) * 2005-11-21 2010-08-25 ソニー株式会社 半導体装置および半導体装置の製造方法
KR100714476B1 (ko) * 2005-11-25 2007-05-07 삼성전자주식회사 반도체 장치 및 그 제조 방법
JP5076482B2 (ja) * 2006-01-20 2012-11-21 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4740071B2 (ja) 2006-08-31 2011-08-03 株式会社東芝 半導体装置
US7964496B2 (en) * 2006-11-21 2011-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. Schemes for forming barrier layers for copper in interconnect structures
KR101629965B1 (ko) * 2007-04-09 2016-06-13 프레지던트 앤드 펠로우즈 오브 하바드 칼리지 구리 배선용 코발트 질화물층 및 이의 제조방법
JP2009147137A (ja) * 2007-12-14 2009-07-02 Toshiba Corp 半導体装置およびその製造方法
JP5358950B2 (ja) * 2008-01-07 2013-12-04 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置
US7843063B2 (en) * 2008-02-14 2010-11-30 International Business Machines Corporation Microstructure modification in copper interconnect structure
US8013445B2 (en) * 2008-02-29 2011-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Low resistance high reliability contact via and metal line structure for semiconductor device
US7867891B2 (en) 2008-12-10 2011-01-11 Intel Corporation Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance
JP4415100B1 (ja) 2008-12-19 2010-02-17 国立大学法人東北大学 銅配線、半導体装置および銅配線形成方法
JP5326558B2 (ja) * 2008-12-26 2013-10-30 富士通セミコンダクター株式会社 半導体装置の製造方法
US8531033B2 (en) * 2009-09-07 2013-09-10 Advanced Interconnect Materials, Llc Contact plug structure, semiconductor device, and method for forming contact plug
US7956463B2 (en) * 2009-09-16 2011-06-07 International Business Machines Corporation Large grain size conductive structure for narrow interconnect openings
US8653663B2 (en) 2009-10-29 2014-02-18 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier layer for copper interconnect
US8772942B2 (en) 2010-01-26 2014-07-08 International Business Machines Corporation Interconnect structure employing a Mn-group VIIIB alloy liner
US20110266676A1 (en) 2010-05-03 2011-11-03 Toshiba America Electronic Components, Inc. Method for forming interconnection line and semiconductor structure
US20120141667A1 (en) 2010-07-16 2012-06-07 Applied Materials, Inc. Methods for forming barrier/seed layers for copper interconnect structures
US8508018B2 (en) * 2010-09-24 2013-08-13 Intel Corporation Barrier layers
JP5734757B2 (ja) 2011-06-16 2015-06-17 株式会社東芝 半導体装置及びその製造方法
US8546885B2 (en) * 2011-07-25 2013-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Metal gate electrode of a field effect transistor
KR20130060432A (ko) * 2011-11-30 2013-06-10 삼성전자주식회사 반도체 장치 및 그 제조 방법
JP6360276B2 (ja) * 2012-03-08 2018-07-18 東京エレクトロン株式会社 半導体装置、半導体装置の製造方法、半導体製造装置
US9330939B2 (en) * 2012-03-28 2016-05-03 Applied Materials, Inc. Method of enabling seamless cobalt gap-fill
US8736056B2 (en) * 2012-07-31 2014-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. Device for reducing contact resistance of a metal
JP2014062312A (ja) * 2012-09-24 2014-04-10 Tokyo Electron Ltd マンガンシリケート膜の形成方法、処理システム、半導体デバイスの製造方法および半導体デバイス
JP2014141739A (ja) 2012-12-27 2014-08-07 Tokyo Electron Ltd 金属マンガン膜の成膜方法、処理システム、電子デバイスの製造方法および電子デバイス
US9514983B2 (en) * 2012-12-28 2016-12-06 Intel Corporation Cobalt based interconnects and methods of fabrication thereof
EP2779224A3 (en) * 2013-03-15 2014-12-31 Applied Materials, Inc. Methods for producing interconnects in semiconductor devices
US20140273436A1 (en) * 2013-03-15 2014-09-18 Globalfoundries Inc. Methods of forming barrier layers for conductive copper structures
US9362228B2 (en) * 2013-10-22 2016-06-07 Globalfoundries Inc. Electro-migration enhancing method for self-forming barrier process in copper metalization
US9997457B2 (en) * 2013-12-20 2018-06-12 Intel Corporation Cobalt based interconnects and methods of fabrication thereof

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