JP6594166B2 - 層を転写するためのプロセス - Google Patents

層を転写するためのプロセス Download PDF

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Publication number
JP6594166B2
JP6594166B2 JP2015217653A JP2015217653A JP6594166B2 JP 6594166 B2 JP6594166 B2 JP 6594166B2 JP 2015217653 A JP2015217653 A JP 2015217653A JP 2015217653 A JP2015217653 A JP 2015217653A JP 6594166 B2 JP6594166 B2 JP 6594166B2
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JP
Japan
Prior art keywords
active layer
temporary substrate
topology
substrate
transfer process
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JP2015217653A
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English (en)
Japanese (ja)
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JP2016096335A (ja
Inventor
マルセル ブルクアールト
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Soitec SA
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Soitec SA
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Publication of JP2016096335A publication Critical patent/JP2016096335A/ja
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Publication of JP6594166B2 publication Critical patent/JP6594166B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68313—Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Micromachines (AREA)
  • Wire Bonding (AREA)
  • Laminated Bodies (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2015217653A 2014-11-14 2015-11-05 層を転写するためのプロセス Active JP6594166B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1402610 2014-11-14
FR1402610A FR3028664B1 (fr) 2014-11-14 2014-11-14 Procede de separation et de transfert de couches

Publications (2)

Publication Number Publication Date
JP2016096335A JP2016096335A (ja) 2016-05-26
JP6594166B2 true JP6594166B2 (ja) 2019-10-23

Family

ID=52358818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015217653A Active JP6594166B2 (ja) 2014-11-14 2015-11-05 層を転写するためのプロセス

Country Status (6)

Country Link
US (1) US9953855B2 (zh)
JP (1) JP6594166B2 (zh)
KR (1) KR102435529B1 (zh)
CN (1) CN105679648B (zh)
DE (1) DE102015221941A1 (zh)
FR (1) FR3028664B1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10446442B2 (en) * 2016-12-21 2019-10-15 Globalfoundries Inc. Integrated circuit chip with molding compound handler substrate and method
US12094930B2 (en) * 2021-04-15 2024-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure and method for forming the same

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1603260A (en) * 1978-05-31 1981-11-25 Secr Defence Devices and their fabrication
JPH11297972A (ja) 1998-04-10 1999-10-29 Fujitsu Ltd 半導体装置の製造方法
JP3668439B2 (ja) * 2001-06-14 2005-07-06 ソニーケミカル株式会社 接着フィルム
JP2003142666A (ja) 2001-07-24 2003-05-16 Seiko Epson Corp 素子の転写方法、素子の製造方法、集積回路、回路基板、電気光学装置、ｉｃカード、及び電子機器
JP4058425B2 (ja) * 2004-06-10 2008-03-12 Ｔｄｋ株式会社 スタンパー、インプリント方法および情報記録媒体製造方法
JP2007158231A (ja) 2005-12-08 2007-06-21 Seiko Epson Corp 基板の加工方法、保護基板及び電子機器
JP5499428B2 (ja) * 2007-09-07 2014-05-21 株式会社Ｓｕｍｃｏ 貼り合わせウェーハの製造方法
FR2926671B1 (fr) 2008-01-17 2010-04-02 Soitec Silicon On Insulator Procede de traitement de defauts lors de collage de plaques
JP5696349B2 (ja) * 2008-09-05 2015-04-08 株式会社Sumco 裏面照射型固体撮像素子用ウェーハの製造方法
FR2938202B1 (fr) * 2008-11-07 2010-12-31 Soitec Silicon On Insulator Traitement de surface pour adhesion moleculaire
KR101144842B1 (ko) * 2010-06-08 2012-05-14 삼성코닝정밀소재 주식회사 접합기판 제조방법
US8202786B2 (en) * 2010-07-15 2012-06-19 Infineon Technologies Austria Ag Method for manufacturing semiconductor devices having a glass substrate
WO2012077738A1 (ja) * 2010-12-09 2012-06-14 旭化成株式会社 微細構造積層体、微細構造積層体の作製方法及び微細構造体の製造方法
KR101354491B1 (ko) * 2012-01-26 2014-01-23 전북대학교산학협력단 고효율 발광다이오드 제조방법
KR101291092B1 (ko) 2012-04-06 2013-08-01 주식회사 씨티랩 반도체 소자 구조물을 제조하는 방법

Also Published As

Publication number Publication date
KR102435529B1 (ko) 2022-08-23
US9953855B2 (en) 2018-04-24
CN105679648B (zh) 2020-03-13
CN105679648A (zh) 2016-06-15
JP2016096335A (ja) 2016-05-26
KR20160058045A (ko) 2016-05-24
FR3028664B1 (fr) 2016-11-25
US20160141198A1 (en) 2016-05-19
FR3028664A1 (fr) 2016-05-20
DE102015221941A1 (de) 2016-06-02

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