JP6530298B2 - 配線基板、半導体装置及び配線基板の製造方法 - Google Patents

配線基板、半導体装置及び配線基板の製造方法 Download PDF

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Publication number
JP6530298B2
JP6530298B2 JP2015201143A JP2015201143A JP6530298B2 JP 6530298 B2 JP6530298 B2 JP 6530298B2 JP 2015201143 A JP2015201143 A JP 2015201143A JP 2015201143 A JP2015201143 A JP 2015201143A JP 6530298 B2 JP6530298 B2 JP 6530298B2
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Prior art keywords
layer
connection terminal
insulating layer
wiring
protective insulating
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Japanese (ja)
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JP2017073520A (ja
JP2017073520A5 (enExample
Inventor
大井　淳
淳 大井
知剛 峯村
知剛 峯村
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2015201143A priority Critical patent/JP6530298B2/ja
Priority to US15/284,592 priority patent/US9997450B2/en
Publication of JP2017073520A publication Critical patent/JP2017073520A/ja
Publication of JP2017073520A5 publication Critical patent/JP2017073520A5/ja
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9221—Parallel connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/36—Material effects
    • H01L2924/365—Metallurgical effects
    • H01L2924/3656—Formation of Kirkendall voids

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  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
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US10163832B1 (en) * 2017-10-27 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated fan-out package, redistribution circuit structure, and method of fabricating the same
CN113611785B (zh) 2018-02-01 2022-05-27 新唐科技日本株式会社 半导体装置
JP7067114B2 (ja) * 2018-02-27 2022-05-16 三菱マテリアル株式会社 絶縁回路基板及びその製造方法
KR102666153B1 (ko) * 2018-06-15 2024-05-17 삼성전자주식회사 반도체 장치
JP7097139B2 (ja) 2018-07-26 2022-07-07 京セラ株式会社 配線基板
KR102513086B1 (ko) * 2018-10-01 2023-03-23 삼성전자주식회사 반도체 패키지
JP7253946B2 (ja) * 2019-03-20 2023-04-07 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
US10950519B2 (en) * 2019-05-31 2021-03-16 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and method
JP2020202205A (ja) * 2019-06-06 2020-12-17 イビデン株式会社 プリント配線板とプリント配線板の製造方法
US12245366B2 (en) 2019-10-30 2025-03-04 Kyocera Corporation Wiring board
US11854879B2 (en) 2020-02-26 2023-12-26 Raytheon Company Cu3Sn via metallization in electrical devices for low-temperature 3D-integration
KR102854173B1 (ko) * 2020-07-24 2025-09-03 삼성전기주식회사 인쇄회로기판
CN116529870A (zh) * 2020-10-30 2023-08-01 京瓷株式会社 布线基板、电子装置以及电子模块
KR20250146094A (ko) * 2024-03-29 2025-10-13 엘지이노텍 주식회사 회로 기판 및 이를 포함하는 반도체 패키지
TWI869312B (zh) * 2024-07-09 2025-01-01 頎邦科技股份有限公司 具有微凸塊之基板構造及其製造方法
CN118737976B (zh) * 2024-09-03 2025-01-10 安徽长飞先进半导体股份有限公司 半导体器件及制备方法、功率模块、功率转换电路和车辆

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