JP7097139B2 - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP7097139B2 JP7097139B2 JP2018139884A JP2018139884A JP7097139B2 JP 7097139 B2 JP7097139 B2 JP 7097139B2 JP 2018139884 A JP2018139884 A JP 2018139884A JP 2018139884 A JP2018139884 A JP 2018139884A JP 7097139 B2 JP7097139 B2 JP 7097139B2
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- JP
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- Prior art keywords
- via hole
- conductor
- hole conductor
- crystal particles
- region
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0029—Etching of the substrate by chemical or physical means by laser ablation of inorganic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0263—Details about a collection of particles
- H05K2201/0269—Non-uniform distribution or concentration of particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
Description
11 コア層
12 スルーホール導体
13 絶縁層
14 ビアホール導体
14a ビア底
14b ビア本体
15 ビアランド
Claims (3)
- 複数の絶縁層と、
該絶縁層の表面に形成されており、ビアランドを含む配線導体層と、
前記絶縁層の上面から下面まで貫通するビアホールと、
該ビアホールに充填されたビアホール導体と、
を含み、
該ビアホール導体のビア底が、前記ビアランドと接触しており、
前記ビアホール導体は、前記ビア底とビア本体とを有し、該ビア本体が、前記ビア底よりも上方に位置するとともに前記ビアホール導体のうち前記ビアランドから前記ビアホール導体の高さを100とした場合の相対値で20以下の高さまでの領域であるビア底領域と、前記ビア底領域以外のビア本体領域とを有しており、
前記ビア底領域は、前記ビアホールの内壁に位置する外周部と、該外周部の内側に位置する領域である内周部とからなり、
前記ビア底を形成している結晶粒子が、前記ビア本体領域および前記ビアランドを形成している結晶粒子よりも小さく、
前記ビア底領域の前記外周部を形成している結晶粒子が、前記ビア底領域の前記内周部を形成している結晶粒子よりも小さいことを特徴とする配線基板。 - 前記ビア底を形成している結晶粒子の平均粒子径が、前記ビアホール導体のビア底以外の部分および前記ビアランドを形成している結晶粒子の平均粒子径を100とした場合の 相対値で1~20である請求項1に記載の配線基板。
- 前記ビア底の厚みが、前記ビアホール導体の高さを100とした場合の相対値で0.1 ~10である請求項1または2に記載の配線基板。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018139884A JP7097139B2 (ja) | 2018-07-26 | 2018-07-26 | 配線基板 |
US16/522,302 US11322417B2 (en) | 2018-07-26 | 2019-07-25 | Wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018139884A JP7097139B2 (ja) | 2018-07-26 | 2018-07-26 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2020017639A JP2020017639A (ja) | 2020-01-30 |
JP7097139B2 true JP7097139B2 (ja) | 2022-07-07 |
Family
ID=69177473
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018139884A Active JP7097139B2 (ja) | 2018-07-26 | 2018-07-26 | 配線基板 |
Country Status (2)
Country | Link |
---|---|
US (1) | US11322417B2 (ja) |
JP (1) | JP7097139B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7219598B2 (ja) * | 2018-11-27 | 2023-02-08 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
US11398419B2 (en) * | 2020-07-16 | 2022-07-26 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
US20220148954A1 (en) * | 2020-11-06 | 2022-05-12 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
WO2024024878A1 (ja) * | 2022-07-27 | 2024-02-01 | 京セラ株式会社 | 配線基板およびそれを用いた実装構造体 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004128177A (ja) | 2002-10-02 | 2004-04-22 | Hitachi Cable Ltd | 配線板の製造方法及び配線板、ならびに半導体装置 |
JP2006114787A (ja) | 2004-10-15 | 2006-04-27 | Sumitomo Bakelite Co Ltd | 回路基板の製造方法 |
WO2008120755A1 (ja) | 2007-03-30 | 2008-10-09 | Nec Corporation | 機能素子内蔵回路基板及びその製造方法、並びに電子機器 |
JP2010153628A (ja) | 2008-12-25 | 2010-07-08 | Hitachi Chem Co Ltd | 多層配線基板の製造方法 |
JP2017073520A (ja) | 2015-10-09 | 2017-04-13 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3819670B2 (ja) * | 2000-04-14 | 2006-09-13 | 富士通株式会社 | ダマシン配線を有する半導体装置 |
JP3851768B2 (ja) | 2000-10-24 | 2006-11-29 | 日本特殊陶業株式会社 | 配線基板及び配線基板の製造方法 |
DE102014115105B4 (de) * | 2014-10-09 | 2023-06-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Halbleitereinrichtung und Verfahren zur Herstellung einer Halbleitereinrichtung |
-
2018
- 2018-07-26 JP JP2018139884A patent/JP7097139B2/ja active Active
-
2019
- 2019-07-25 US US16/522,302 patent/US11322417B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004128177A (ja) | 2002-10-02 | 2004-04-22 | Hitachi Cable Ltd | 配線板の製造方法及び配線板、ならびに半導体装置 |
JP2006114787A (ja) | 2004-10-15 | 2006-04-27 | Sumitomo Bakelite Co Ltd | 回路基板の製造方法 |
WO2008120755A1 (ja) | 2007-03-30 | 2008-10-09 | Nec Corporation | 機能素子内蔵回路基板及びその製造方法、並びに電子機器 |
JP2010153628A (ja) | 2008-12-25 | 2010-07-08 | Hitachi Chem Co Ltd | 多層配線基板の製造方法 |
JP2017073520A (ja) | 2015-10-09 | 2017-04-13 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US11322417B2 (en) | 2022-05-03 |
US20200035575A1 (en) | 2020-01-30 |
JP2020017639A (ja) | 2020-01-30 |
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