JP6495272B2 - Mos−バイポーラ素子 - Google Patents
Mos−バイポーラ素子 Download PDFInfo
- Publication number
- JP6495272B2 JP6495272B2 JP2016528598A JP2016528598A JP6495272B2 JP 6495272 B2 JP6495272 B2 JP 6495272B2 JP 2016528598 A JP2016528598 A JP 2016528598A JP 2016528598 A JP2016528598 A JP 2016528598A JP 6495272 B2 JP6495272 B2 JP 6495272B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- well region
- trench
- semiconductor
- well
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
- H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
- H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
- H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/131—Thyristors having built-in components
Landscapes
- Thyristors (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB1313126.3A GB201313126D0 (en) | 2013-07-23 | 2013-07-23 | MOS-Bipolar Device |
| GB1313126.3 | 2013-07-23 | ||
| GB1314474.6 | 2013-08-13 | ||
| GBGB1314474.6A GB201314474D0 (en) | 2013-07-23 | 2013-08-13 | MOS-Bipolar device |
| PCT/GB2014/052013 WO2015011440A1 (en) | 2013-07-23 | 2014-07-02 | Mos-bipolar device |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016527722A JP2016527722A (ja) | 2016-09-08 |
| JP2016527722A5 JP2016527722A5 (https=) | 2017-08-24 |
| JP6495272B2 true JP6495272B2 (ja) | 2019-04-03 |
Family
ID=49119141
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016528598A Active JP6495272B2 (ja) | 2013-07-23 | 2014-07-02 | Mos−バイポーラ素子 |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US10170605B2 (https=) |
| EP (1) | EP3025373B1 (https=) |
| JP (1) | JP6495272B2 (https=) |
| KR (1) | KR102173473B1 (https=) |
| CN (1) | CN105706241B (https=) |
| AU (1) | AU2014294820B2 (https=) |
| CA (1) | CA2918848A1 (https=) |
| ES (1) | ES2942334T3 (https=) |
| GB (3) | GB201313126D0 (https=) |
| WO (1) | WO2015011440A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102016112721B4 (de) | 2016-07-12 | 2022-02-03 | Infineon Technologies Ag | n-Kanal-Leistungshalbleitervorrichtung mit p-Schicht im Driftvolumen |
| DE102016117264B4 (de) | 2016-09-14 | 2020-10-08 | Infineon Technologies Ag | Leistungshalbleiterbauelement mit Steuerbarkeit von dU/dt |
| DE102017107174B4 (de) | 2017-04-04 | 2020-10-08 | Infineon Technologies Ag | IGBT mit dV/dt-Steuerbarkeit und Verfahren zum Verarbeiten eines IGBT |
| DE102017124872B4 (de) | 2017-10-24 | 2021-02-18 | Infineon Technologies Ag | Verfahren zur Herstellung eines IGBT mit dV/dt-Steuerbarkeit |
| DE102017124871B4 (de) | 2017-10-24 | 2021-06-17 | Infineon Technologies Ag | Leistungshalbleiter-Vorrichtung und Verfahren zum Herstellen einer Leistungshalbleiter-Vorrichtung |
| GB2606383B (en) | 2021-05-06 | 2026-03-25 | Eco Semiconductors Ltd | A semiconductor device |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4761011B2 (ja) * | 1999-05-26 | 2011-08-31 | 株式会社豊田中央研究所 | サイリスタを有する半導体装置及びその製造方法 |
| GB9921068D0 (en) * | 1999-09-08 | 1999-11-10 | Univ Montfort | Bipolar mosfet device |
| JP4028333B2 (ja) * | 2002-09-02 | 2007-12-26 | 株式会社東芝 | 半導体装置 |
| JP4130356B2 (ja) * | 2002-12-20 | 2008-08-06 | 株式会社東芝 | 半導体装置 |
| JP5984282B2 (ja) * | 2006-04-27 | 2016-09-06 | 富士電機株式会社 | 縦型トレンチ型絶縁ゲートmos半導体装置 |
| US7968940B2 (en) * | 2007-07-05 | 2011-06-28 | Anpec Electronics Corporation | Insulated gate bipolar transistor device comprising a depletion-mode MOSFET |
| US8716746B2 (en) * | 2010-08-17 | 2014-05-06 | Denso Corporation | Semiconductor device |
| JP5634318B2 (ja) * | 2011-04-19 | 2014-12-03 | 三菱電機株式会社 | 半導体装置 |
| US8564047B2 (en) | 2011-09-27 | 2013-10-22 | Force Mos Technology Co., Ltd. | Semiconductor power devices integrated with a trenched clamp diode |
-
2013
- 2013-07-23 GB GBGB1313126.3A patent/GB201313126D0/en not_active Ceased
- 2013-08-13 GB GBGB1314474.6A patent/GB201314474D0/en not_active Ceased
- 2013-08-13 GB GBGB1314475.3A patent/GB201314475D0/en active Pending
-
2014
- 2014-07-02 EP EP14749944.6A patent/EP3025373B1/en active Active
- 2014-07-02 CN CN201480042128.2A patent/CN105706241B/zh active Active
- 2014-07-02 JP JP2016528598A patent/JP6495272B2/ja active Active
- 2014-07-02 US US14/906,654 patent/US10170605B2/en active Active
- 2014-07-02 AU AU2014294820A patent/AU2014294820B2/en active Active
- 2014-07-02 ES ES14749944T patent/ES2942334T3/es active Active
- 2014-07-02 WO PCT/GB2014/052013 patent/WO2015011440A1/en not_active Ceased
- 2014-07-02 KR KR1020167004755A patent/KR102173473B1/ko active Active
- 2014-07-02 CA CA2918848A patent/CA2918848A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| GB201314474D0 (en) | 2013-09-25 |
| EP3025373B1 (en) | 2022-12-21 |
| WO2015011440A1 (en) | 2015-01-29 |
| AU2014294820A1 (en) | 2016-02-11 |
| US10170605B2 (en) | 2019-01-01 |
| AU2014294820B2 (en) | 2018-04-05 |
| KR102173473B1 (ko) | 2020-11-03 |
| ES2942334T3 (es) | 2023-05-31 |
| CN105706241B (zh) | 2019-12-31 |
| KR20160035029A (ko) | 2016-03-30 |
| GB201314475D0 (en) | 2013-09-25 |
| CN105706241A (zh) | 2016-06-22 |
| JP2016527722A (ja) | 2016-09-08 |
| CA2918848A1 (en) | 2015-01-29 |
| EP3025373A1 (en) | 2016-06-01 |
| GB201313126D0 (en) | 2013-09-04 |
| US20160155831A1 (en) | 2016-06-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6021908B2 (ja) | 絶縁ゲート型バイポーラトランジスタ | |
| CN105047712B (zh) | 纵向型半导体装置及其制造方法 | |
| US9576841B2 (en) | Semiconductor device and manufacturing method | |
| CN103650148B (zh) | 绝缘栅双极晶体管 | |
| JP5787853B2 (ja) | 電力用半導体装置 | |
| JP7403401B2 (ja) | 半導体装置 | |
| JP6495272B2 (ja) | Mos−バイポーラ素子 | |
| US20130248882A1 (en) | Semiconductor device | |
| US6818940B2 (en) | Insulated gate bipolar transistor having trench gates of rectangular upper surfaces with different widths | |
| CN111886680B (zh) | 碳化硅半导体装置及其制造方法 | |
| CN107534053A (zh) | 半导体装置及其制造方法 | |
| CN105762182A (zh) | 具有高抗闩锁能力的igbt器件 | |
| KR101550798B1 (ko) | 래치업 억제구조를 가지는 전력용 반도체 장치 및 그 제조방법 | |
| US9245986B2 (en) | Power semiconductor device and method of manufacturing the same | |
| KR101949519B1 (ko) | 전력 반도체 소자 및 그 제조방법 | |
| KR102159418B1 (ko) | 슈퍼 정션 mosfet 및 그 제조 방법 | |
| CN205621737U (zh) | 一种抗闩锁igbt器件 | |
| CN113140634A (zh) | 一种半导体器件及其制造方法 | |
| GB2606383A (en) | A semiconductor device | |
| CN121240473A (zh) | 半导体器件、制备方法以及芯片 | |
| CN103855201A (zh) | Igbt及其制作方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170629 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170629 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180320 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20180620 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20180820 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180920 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190206 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190306 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6495272 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |