JP6470956B2 - 樹脂封止用金型とその製造方法 - Google Patents
樹脂封止用金型とその製造方法 Download PDFInfo
- Publication number
- JP6470956B2 JP6470956B2 JP2014250011A JP2014250011A JP6470956B2 JP 6470956 B2 JP6470956 B2 JP 6470956B2 JP 2014250011 A JP2014250011 A JP 2014250011A JP 2014250011 A JP2014250011 A JP 2014250011A JP 6470956 B2 JP6470956 B2 JP 6470956B2
- Authority
- JP
- Japan
- Prior art keywords
- cavity
- mold
- die
- resin
- corners
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000007789 sealing Methods 0.000 title claims description 42
- 239000011347 resin Substances 0.000 title claims description 23
- 229920005989 resin Polymers 0.000 title claims description 23
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000004065 semiconductor Substances 0.000 claims description 53
- 238000005520 cutting process Methods 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 11
- 239000007769 metal material Substances 0.000 claims description 4
- 238000005538 encapsulation Methods 0.000 claims 1
- 238000003754 machining Methods 0.000 description 35
- 238000009760 electrical discharge machining Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 6
- 235000004522 Pentaglottis sempervirens Nutrition 0.000 description 4
- 240000004050 Pentaglottis sempervirens Species 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000003801 milling Methods 0.000 description 3
- 235000014443 Pyrus communis Nutrition 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 1
- 238000010891 electric arc Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000003350 kerosene Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C3/00—Milling particular work; Special milling operations; Machines therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C2220/00—Details of milling processes
- B23C2220/44—High speed milling
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C2220/00—Details of milling processes
- B23C2220/64—Using an endmill, i.e. a shaft milling cutter, to generate profile of a crankshaft or camshaft
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
半導体パッケージに、できるだけ大きな半導体チップを搭載できるようにするには封止樹脂のコーナー部を直角形状としているのが一般的である。
まず、半導体チップの樹脂封止用金型であって、前記金型に設けられたキャビティは、前記金型の表面に形成した第1のキャビティと、前記第1のキャビティの内側底面に重畳して設けた第2のキャビティと、前記第2キャビティの上面周囲に設けた段差部とからなり、前記第1のキャビティおよび前記第2のキャビティの4隅には所定の曲率半径のコーナー部を有することを特徴とする樹脂封止用金型とした。
また、型彫放電加工を用いた場合に発生する金型のキャビティ加工面の梨地によるアンダーカットによる樹脂封止後の金型からの離形時に樹脂クラック発生懸念のない金型製造が可能となる。
図1は、本発明の半導体パッケージ用樹脂封止金型の鳥瞰図である。本図は、半導体チップ1個分の拡大図である。
2 第1のキャビティ
2a 第1のキャビティのコーナー部
3 第2のキャビティ
3a 第2のキャビティのコーナー部
4 円形刃物
5 段差部
17 第2の封止体
18 第1の封止体
19 アウターリード
20 ワイヤー
21 半導体チップ
22 アイランド
23 樹脂段差
Claims (2)
- 半導体チップの樹脂封止用の金型であって、
前記金型の表面に形成した第1のキャビティと、
前記第1のキャビティの内側底面に平面視的に重畳して設けた第2のキャビティと、
前記第2のキャビティの上面周囲に設けた段差部と、を有し、
前記第1のキャビティの4隅および前記第2のキャビティの4隅にはそれぞれ所定の曲率半径を有するコーナー部を備え、
前記第2のキャビティの内側底面に重畳して順次設けられた第3乃至第n段のキャビティと、前記第3乃至第n段のキャビティのそれぞれの上面周囲に設けた段差部とからなり、前記第3乃至前記第n段のキャビティのそれぞれの4隅にはそれぞれ所定の曲率半径を有するコーナー部をさらに備えたことを特徴とする樹脂封止用金型。 - 半導体チップの樹脂封止用の金型の製造方法であって、
金属材料を準備する工程と、
前記金属材料を第1の円形刃物にて高速回転切削加工して第1のキャビティを形成するとともに前記第1のキャビティの4隅に第1の曲率半径のコーナー部を形成する工程と、
前記第1のキャビティの内側底面に第2の円形刃物にて高速切削加工して第2のキャビティを形成するとともに前記第2のキャビティの4隅に第2の曲率半径のコーナー部を形成する工程と、
前記第2のキャビティの内側底面に第3乃至第n段の円形刃物にて高速切削加工して第3乃至第n段のキャビティをそれぞれ形成するとともに、第3乃至第n段のキャビティのそれぞれの4隅に第3乃至第n段の曲率半径のコーナー部を形成する工程と、
からなることを特徴とする樹脂封止用金型の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014250011A JP6470956B2 (ja) | 2014-12-10 | 2014-12-10 | 樹脂封止用金型とその製造方法 |
US14/946,903 US10850334B2 (en) | 2014-12-10 | 2015-11-20 | Mold for resin sealing a semiconductor chip, and semiconductor device having resin-sealed semiconductor chip |
KR1020150174114A KR20160070696A (ko) | 2014-12-10 | 2015-12-08 | 수지 봉지용 금형과 그 제조 방법, 및 반도체 장치 |
CN201510917421.5A CN105702590B (zh) | 2014-12-10 | 2015-12-10 | 树脂密封用模具及其制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014250011A JP6470956B2 (ja) | 2014-12-10 | 2014-12-10 | 樹脂封止用金型とその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016107594A JP2016107594A (ja) | 2016-06-20 |
JP6470956B2 true JP6470956B2 (ja) | 2019-02-13 |
Family
ID=56111911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014250011A Expired - Fee Related JP6470956B2 (ja) | 2014-12-10 | 2014-12-10 | 樹脂封止用金型とその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10850334B2 (ja) |
JP (1) | JP6470956B2 (ja) |
KR (1) | KR20160070696A (ja) |
CN (1) | CN105702590B (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017147272A (ja) * | 2016-02-15 | 2017-08-24 | ローム株式会社 | 半導体装置およびその製造方法、ならびに、半導体装置の製造に使用されるリードフレーム中間体 |
JP6772653B2 (ja) * | 2016-08-15 | 2020-10-21 | 富士通株式会社 | 冷却ユニット及び情報処理装置 |
US10531573B2 (en) * | 2016-10-28 | 2020-01-07 | Xfmrs, Inc. | Electrical component package with reinforced molded pins |
US11432407B2 (en) | 2016-10-28 | 2022-08-30 | Xfmrs, Inc. | Electrical component package with reinforced molded pins |
CN108246981B (zh) * | 2018-03-15 | 2024-07-19 | 宁波兰迪汽配工业有限公司 | 一种齿轮马达模具 |
CN112191898B (zh) * | 2020-09-14 | 2022-11-22 | 西安昆仑工业(集团)有限责任公司 | 一种半圆柱型腔粗加工数控加工方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0452754U (ja) * | 1990-09-11 | 1992-05-06 | ||
JPH10154768A (ja) * | 1996-11-25 | 1998-06-09 | Texas Instr Japan Ltd | 半導体装置及びその製造方法 |
JP2000102929A (ja) | 1998-09-29 | 2000-04-11 | Towa Corp | 電子部品の樹脂封止成形用金型の加工方法 |
US6452268B1 (en) | 2000-04-26 | 2002-09-17 | Siliconware Precision Industries Co., Ltd. | Integrated circuit package configuration having an encapsulating body with a flanged portion and an encapsulating mold for molding the encapsulating body |
US6924514B2 (en) * | 2002-02-19 | 2005-08-02 | Nichia Corporation | Light-emitting device and process for producing thereof |
JP2006027074A (ja) * | 2004-07-16 | 2006-02-02 | Towa Corp | 電子部品の樹脂封止成形用金型の加工方法 |
JP5192811B2 (ja) * | 2004-09-10 | 2013-05-08 | ソウル セミコンダクター カンパニー リミテッド | 多重モールド樹脂を有する発光ダイオードパッケージ |
US7868471B2 (en) * | 2007-09-13 | 2011-01-11 | Stats Chippac Ltd. | Integrated circuit package-in-package system with leads |
JP5278037B2 (ja) * | 2009-02-26 | 2013-09-04 | 大日本印刷株式会社 | 樹脂封止型半導体装置 |
TW201145597A (en) * | 2010-01-28 | 2011-12-16 | Lg Innotek Co Ltd | Light emitting device package |
KR20120028591A (ko) * | 2010-09-15 | 2012-03-23 | 삼성전자주식회사 | 반도체 패키징용 몰딩장치 및 몰딩방법 |
CN103348496A (zh) * | 2011-02-07 | 2013-10-09 | 克利公司 | 用于发光二极管(led)发光的部件和方法 |
JP5965706B2 (ja) * | 2012-04-12 | 2016-08-10 | 日立オートモティブシステムズ株式会社 | 流量センサの製造方法 |
TWI565105B (zh) * | 2012-07-09 | 2017-01-01 | 山田尖端科技股份有限公司 | 樹脂模塑裝置以及樹脂模塑方法 |
-
2014
- 2014-12-10 JP JP2014250011A patent/JP6470956B2/ja not_active Expired - Fee Related
-
2015
- 2015-11-20 US US14/946,903 patent/US10850334B2/en active Active
- 2015-12-08 KR KR1020150174114A patent/KR20160070696A/ko not_active Application Discontinuation
- 2015-12-10 CN CN201510917421.5A patent/CN105702590B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN105702590A (zh) | 2016-06-22 |
CN105702590B (zh) | 2019-11-19 |
US10850334B2 (en) | 2020-12-01 |
JP2016107594A (ja) | 2016-06-20 |
US20160172316A1 (en) | 2016-06-16 |
KR20160070696A (ko) | 2016-06-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6470956B2 (ja) | 樹脂封止用金型とその製造方法 | |
US20080076208A1 (en) | Method of making a semiconductor package and method of making a semiconductor device | |
US3436810A (en) | Method of packaging integrated circuits | |
JP2007204828A (ja) | 三次元積層造形部品の表面仕上げ方法 | |
US10501863B2 (en) | Forming method and formed article | |
CN105312644A (zh) | 一种蛤壳式薄壁零件的加工方法 | |
JPH036663B2 (ja) | ||
KR101761179B1 (ko) | 카메라 홀더 사출물 성형을 위한 사출금형의 가공방법 | |
US20060073676A1 (en) | Pre-process before cutting a wafer and method of cutting a wafer | |
JP4815212B2 (ja) | メモリーカードの製造方法 | |
US11569152B2 (en) | Electronic device with lead pitch gap | |
US8859338B2 (en) | Method of manufacturing a semiconductor device and semiconductor device | |
JP6084114B2 (ja) | パッケージ基板の加工方法 | |
JP2004006585A (ja) | 混成集積回路装置の製造方法 | |
CN105215495B (zh) | 一种用于钛合金深盲槽棱角加工的方法 | |
CN103474358A (zh) | 多圈qfn封装引线框架制备方法 | |
TWI826277B (zh) | 封裝方法 | |
JP2016151033A (ja) | 円筒型部材の製造方法 | |
WO2018088080A1 (ja) | 半導体装置およびその製造方法 | |
CN105108922B (zh) | 陶瓷体生瓷坯倒角模具及倒角方法 | |
KR20190070744A (ko) | 최적화 형상의 캐리어 플레이트 및 이를 기계가공하기 위한 특수가공 툴 | |
CN113751968B (zh) | 一种以原子灰构建加工基准的模具镶块加工方法 | |
JP2007077443A (ja) | 三次元形状造形物の製造方法 | |
CN113889524A (zh) | 扇形芯片晶圆切割设备及其切割方法 | |
JP2000102929A (ja) | 電子部品の樹脂封止成形用金型の加工方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20171004 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180927 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20181009 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181102 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190108 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190121 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6470956 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |