JP6419770B2 - 高周波数クロックインターコネクトのための出力振幅検出器をもつ電流モードバッファ - Google Patents
高周波数クロックインターコネクトのための出力振幅検出器をもつ電流モードバッファ Download PDFInfo
- Publication number
- JP6419770B2 JP6419770B2 JP2016501316A JP2016501316A JP6419770B2 JP 6419770 B2 JP6419770 B2 JP 6419770B2 JP 2016501316 A JP2016501316 A JP 2016501316A JP 2016501316 A JP2016501316 A JP 2016501316A JP 6419770 B2 JP6419770 B2 JP 6419770B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- terminal
- current
- nmos transistor
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000872 buffer Substances 0.000 title description 7
- 239000003990 capacitor Substances 0.000 claims description 68
- 230000008878 coupling Effects 0.000 claims description 36
- 238000010168 coupling process Methods 0.000 claims description 36
- 238000005859 coupling reaction Methods 0.000 claims description 36
- 230000007423 decrease Effects 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 25
- 230000004044 response Effects 0.000 claims description 19
- 230000010355 oscillation Effects 0.000 claims description 18
- 230000003247 decreasing effect Effects 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 7
- 230000008859 change Effects 0.000 description 4
- 238000007792 addition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K6/00—Manipulating pulses having a finite slope and not covered by one of the other main groups of this subclass
- H03K6/02—Amplifying pulses
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Amplifiers (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/834,861 US8766674B1 (en) | 2013-03-15 | 2013-03-15 | Current-mode buffer with output swing detector for high frequency clock interconnect |
| US13/834,861 | 2013-03-15 | ||
| PCT/US2014/023684 WO2014150581A1 (en) | 2013-03-15 | 2014-03-11 | Current-mode buffer with output swing detector for high frequency clock interconnect |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016518732A JP2016518732A (ja) | 2016-06-23 |
| JP2016518732A5 JP2016518732A5 (enExample) | 2017-03-23 |
| JP6419770B2 true JP6419770B2 (ja) | 2018-11-07 |
Family
ID=50434295
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016501316A Expired - Fee Related JP6419770B2 (ja) | 2013-03-15 | 2014-03-11 | 高周波数クロックインターコネクトのための出力振幅検出器をもつ電流モードバッファ |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8766674B1 (enExample) |
| EP (1) | EP2974020B1 (enExample) |
| JP (1) | JP6419770B2 (enExample) |
| KR (1) | KR20150131141A (enExample) |
| CN (1) | CN105191128B (enExample) |
| WO (1) | WO2014150581A1 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9985644B1 (en) * | 2018-01-16 | 2018-05-29 | Realtek Semiconductor Corp. | Digital to-time converter and method therof |
| US10219339B1 (en) * | 2018-02-19 | 2019-02-26 | Ixys, Llc | Current correction techniques for accurate high current short channel driver |
| US11482155B2 (en) * | 2018-07-20 | 2022-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Receiving circuit |
| FR3102581B1 (fr) * | 2019-10-23 | 2021-10-22 | St Microelectronics Rousset | Régulateur de tension |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4539489A (en) * | 1983-06-22 | 1985-09-03 | Motorola, Inc. | CMOS Schmitt trigger circuit |
| US5459437A (en) * | 1994-05-10 | 1995-10-17 | Integrated Device Technology | Logic gate with controllable hysteresis and high frequency voltage controlled oscillator |
| US5497127A (en) * | 1994-12-14 | 1996-03-05 | David Sarnoff Research Center, Inc. | Wide frequency range CMOS relaxation oscillator with variable hysteresis |
| US5726596A (en) * | 1996-03-01 | 1998-03-10 | Hewlett-Packard Company | High-performance, low-skew clocking scheme for single-phase, high-frequency global VLSI processor |
| US6323756B1 (en) * | 1997-09-02 | 2001-11-27 | Matsushita Electric Industrial Co., Ltd. | Data transmitter |
| US5939937A (en) * | 1997-09-29 | 1999-08-17 | Siemens Aktiengesellschaft | Constant current CMOS output driver circuit with dual gate transistor devices |
| JP3152204B2 (ja) * | 1998-06-02 | 2001-04-03 | 日本電気株式会社 | スルーレート出力回路 |
| US6177819B1 (en) * | 1999-04-01 | 2001-01-23 | Xilinx, Inc. | Integrated circuit driver with adjustable trip point |
| JP3520913B2 (ja) * | 2000-06-09 | 2004-04-19 | 日本電気株式会社 | 信号線制御方式 |
| US6316977B1 (en) * | 2000-07-14 | 2001-11-13 | Pmc-Sierra, Inc. | Low charge-injection charge pump |
| US6356106B1 (en) * | 2000-09-12 | 2002-03-12 | Micron Technology, Inc. | Active termination in a multidrop memory system |
| US7493149B1 (en) | 2002-03-26 | 2009-02-17 | National Semiconductor Corporation | Method and system for minimizing power consumption in mobile devices using cooperative adaptive voltage and threshold scaling |
| JP4869569B2 (ja) | 2004-06-23 | 2012-02-08 | 株式会社 日立ディスプレイズ | 表示装置 |
| KR100890041B1 (ko) * | 2006-12-29 | 2009-03-25 | 주식회사 하이닉스반도체 | 반도체 소자의 클럭 버퍼 회로 |
| US7502719B2 (en) | 2007-01-25 | 2009-03-10 | Monolithic Power Systems, Inc. | Method and apparatus for overshoot and undershoot errors correction in analog low dropout regulators |
| US7652511B2 (en) * | 2008-01-16 | 2010-01-26 | Amazing Microelectronic Corp. | Slew-rate control circuitry with output buffer and feedback |
| CN101540603A (zh) | 2008-03-21 | 2009-09-23 | 意法半导体研发(上海)有限公司 | 用于高频信号的功效推挽式缓冲电路、系统和方法 |
| US7902904B2 (en) * | 2008-12-09 | 2011-03-08 | Lsi Corporation | Bias circuit scheme for improved reliability in high voltage supply with low voltage device |
| US8149023B2 (en) * | 2009-10-21 | 2012-04-03 | Qualcomm Incorporated | RF buffer circuit with dynamic biasing |
| KR20110132864A (ko) | 2010-06-03 | 2011-12-09 | 삼성전자주식회사 | 와이드 랜지 주파수 입력에 적합한 위상 보간 회로 및 그에 따른 출력 특성안정화 방법 |
| JP5545751B2 (ja) * | 2010-11-25 | 2014-07-09 | 三菱電機株式会社 | ピークホールド回路及びボトムホールド回路 |
| US8860469B1 (en) * | 2012-07-13 | 2014-10-14 | Altera Corporation | Apparatus and methods for transmitter output swing calibration |
-
2013
- 2013-03-15 US US13/834,861 patent/US8766674B1/en active Active
-
2014
- 2014-03-11 JP JP2016501316A patent/JP6419770B2/ja not_active Expired - Fee Related
- 2014-03-11 CN CN201480014291.8A patent/CN105191128B/zh active Active
- 2014-03-11 KR KR1020157028287A patent/KR20150131141A/ko not_active Withdrawn
- 2014-03-11 WO PCT/US2014/023684 patent/WO2014150581A1/en not_active Ceased
- 2014-03-11 EP EP14715182.3A patent/EP2974020B1/en not_active Not-in-force
Also Published As
| Publication number | Publication date |
|---|---|
| CN105191128A (zh) | 2015-12-23 |
| KR20150131141A (ko) | 2015-11-24 |
| CN105191128B (zh) | 2018-06-12 |
| JP2016518732A (ja) | 2016-06-23 |
| US8766674B1 (en) | 2014-07-01 |
| EP2974020A1 (en) | 2016-01-20 |
| EP2974020B1 (en) | 2019-02-27 |
| WO2014150581A1 (en) | 2014-09-25 |
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