JP6401974B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP6401974B2
JP6401974B2 JP2014172680A JP2014172680A JP6401974B2 JP 6401974 B2 JP6401974 B2 JP 6401974B2 JP 2014172680 A JP2014172680 A JP 2014172680A JP 2014172680 A JP2014172680 A JP 2014172680A JP 6401974 B2 JP6401974 B2 JP 6401974B2
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Japan
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region
film
semiconductor device
manufacturing
gate electrode
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JP2014172680A
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Japanese (ja)
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JP2016048710A (ja
JP2016048710A5 (enExample
Inventor
福夫 大和田
福夫 大和田
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Renesas Electronics Corp
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Renesas Electronics Corp
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Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2014172680A priority Critical patent/JP6401974B2/ja
Priority to TW104126403A priority patent/TWI654718B/zh
Priority to US14/828,046 priority patent/US20160064533A1/en
Priority to CN201510535778.7A priority patent/CN105390448B/zh
Publication of JP2016048710A publication Critical patent/JP2016048710A/ja
Priority to US15/201,609 priority patent/US9685453B2/en
Publication of JP2016048710A5 publication Critical patent/JP2016048710A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
JP2014172680A 2014-08-27 2014-08-27 半導体装置の製造方法 Active JP6401974B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2014172680A JP6401974B2 (ja) 2014-08-27 2014-08-27 半導体装置の製造方法
TW104126403A TWI654718B (zh) 2014-08-27 2015-08-13 半導體裝置的製造方法
US14/828,046 US20160064533A1 (en) 2014-08-27 2015-08-17 Method of manufacturing semiconductor device
CN201510535778.7A CN105390448B (zh) 2014-08-27 2015-08-27 制造半导体器件的方法
US15/201,609 US9685453B2 (en) 2014-08-27 2016-07-04 Method of manufacturing a nonvolatile memory cell and a field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014172680A JP6401974B2 (ja) 2014-08-27 2014-08-27 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2016048710A JP2016048710A (ja) 2016-04-07
JP2016048710A5 JP2016048710A5 (enExample) 2017-06-29
JP6401974B2 true JP6401974B2 (ja) 2018-10-10

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JP2014172680A Active JP6401974B2 (ja) 2014-08-27 2014-08-27 半導体装置の製造方法

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US (2) US20160064533A1 (enExample)
JP (1) JP6401974B2 (enExample)
CN (1) CN105390448B (enExample)
TW (1) TWI654718B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9659953B2 (en) * 2014-07-07 2017-05-23 Taiwan Semiconductor Manufacturing Co., Ltd. HKMG high voltage CMOS for embedded non-volatile memory
JP6594261B2 (ja) * 2016-05-24 2019-10-23 ルネサスエレクトロニクス株式会社 半導体装置
KR102607749B1 (ko) * 2016-08-02 2023-11-29 에스케이하이닉스 주식회사 3차원 구조의 반도체 메모리 장치
JP6889001B2 (ja) 2017-03-30 2021-06-18 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
DE102018107908B4 (de) * 2017-07-28 2023-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum Bilden eines integrierten Schaltkreises mit einer Versiegelungsschicht zum Bilden einer Speicherzellenstruktur in Logik- oder BCD-Technologie sowie ein integrierter Schaltkreis mit einer Dummy-Struktur an einer Grenze einer Vorrichtungsregion
US10504912B2 (en) * 2017-07-28 2019-12-10 Taiwan Semiconductor Manufacturing Co., Ltd. Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology
JP2019102520A (ja) * 2017-11-29 2019-06-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR102778669B1 (ko) 2019-10-14 2025-03-12 양쯔 메모리 테크놀로지스 씨오., 엘티디. 3차원 nand를 위한 비트 라인 드라이버들의 격리를 위한 구조 및 방법
US11799001B2 (en) * 2021-03-09 2023-10-24 Taiwan Semiconductor Manufacturing Company, Ltd. Back-end-of-line devices

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3941517B2 (ja) * 2001-02-07 2007-07-04 ソニー株式会社 半導体装置およびその製造方法
KR100418928B1 (ko) * 2001-10-24 2004-02-14 주식회사 하이닉스반도체 엠디엘 반도체 소자의 제조 방법
JP2004039866A (ja) * 2002-07-03 2004-02-05 Toshiba Corp 半導体装置及びその製造方法
JP2006210718A (ja) * 2005-01-28 2006-08-10 Renesas Technology Corp 半導体装置の製造方法および半導体装置
JP2007005646A (ja) * 2005-06-24 2007-01-11 Sony Corp 半導体集積回路
JP2007234861A (ja) * 2006-03-01 2007-09-13 Renesas Technology Corp 半導体装置の製造方法
US8344446B2 (en) * 2006-12-15 2013-01-01 Nec Corporation Nonvolatile storage device and method for manufacturing the same in which insulating film is located between first and second impurity diffusion regions but absent on first impurity diffusion region
US8361863B2 (en) * 2008-11-13 2013-01-29 Mosys, Inc. Embedded DRAM with multiple gate oxide thicknesses
JP2010245160A (ja) * 2009-04-02 2010-10-28 Renesas Electronics Corp 半導体装置の製造方法
CN102593179A (zh) * 2012-03-09 2012-07-18 上海宏力半导体制造有限公司 Mos晶体管及其制造方法
JP2015118974A (ja) * 2013-12-17 2015-06-25 シナプティクス・ディスプレイ・デバイス合同会社 半導体装置の製造方法
JP6297860B2 (ja) * 2014-02-28 2018-03-20 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
TWI654718B (zh) 2019-03-21
CN105390448A (zh) 2016-03-09
JP2016048710A (ja) 2016-04-07
US9685453B2 (en) 2017-06-20
US20160315093A1 (en) 2016-10-27
CN105390448B (zh) 2021-04-06
TW201614772A (en) 2016-04-16
US20160064533A1 (en) 2016-03-03

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