JP6394848B1 - 基板貼り合わせ構造及び基板貼り合わせ方法 - Google Patents

基板貼り合わせ構造及び基板貼り合わせ方法 Download PDF

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JP6394848B1
JP6394848B1 JP2018534896A JP2018534896A JP6394848B1 JP 6394848 B1 JP6394848 B1 JP 6394848B1 JP 2018534896 A JP2018534896 A JP 2018534896A JP 2018534896 A JP2018534896 A JP 2018534896A JP 6394848 B1 JP6394848 B1 JP 6394848B1
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substrate
circuit
bump
counter substrate
bonding
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JPWO2019176095A1 (ja
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弘一郎 西澤
弘一郎 西澤
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

基板（１）の主面にデバイス（２）が形成されている。基板（１）の主面と対向基板（１４）の下面が接合部材（１１，１２，１３）を介して中空状態で接合されている。回路１７）及びバンプ構造（２６）が対向基板（１４）の上面に形成されている。バンプ構造（２６）は、少なくとも接合部材（１１，１２，１３）に対応する領域に配置され、回路（１７）よりも高さが高い。

Description

本発明は、基板と対向基板を貼り合わせた構造及びその貼り合わせ方法に関する。
半導体装置の実装面積の縮小のため、半導体基板と、別の半導体基板又はガラス或いはサファイアなど半導体以外の基板とを貼り合せた構造が提案されている。また、信頼性の向上のため、基板間に封止枠を設けて中空部を形成した構造も提案されている（例えば、特許文献１参照）。
基板貼り合わせ方法として、ウェハ状態の基板と対向基板を貼り合わせ、ダイシングによりデバイスごとに分離するウェハレベルチップスケールパッケージ（ＷＬＣＳＰ）という方法がある。例えばウェハプロセスで基板にアレイ状にデバイスを形成し、対向基板にもデバイスに対応した回路を形成し、接続バンプを介して両者を接合する。この方法では、一度に多くのデバイスを形成でき、個々にパッケージする場合に比べ低コストである。
日本特開２００９−２８５８１０号公報
基板と対向基板をアライメントして上下から定盤で均一に圧力をかけて接合する。この際に、対向基板は、上面に形成された回路等のエレメントごとに下方向の圧力を受けるため、対向基板上の回路等が損傷する場合があった。また、上側からの圧力が分散され方向を変えて接続バンプに伝わるため、接続バンプに対して真下に十分な圧力を伝えることができなかった。従って、接続バンプの密着性が悪くなり、電気導通がとれなくなる場合があった。この結果、信頼性が損なわれるという問題あった。
本発明は、上述のような課題を解決するためになされたもので、その目的は信頼性を向上させることができる基板貼り合わせ構造及び基板貼り合わせ方法を得るものである。
本発明に係る基板貼り合わせ構造は、主面を持つ基板と、前記基板の前記主面に形成されたデバイスと、前記主面に対向する下面と、前記下面とは反対側の上面とを持つ対向基板と、前記基板の前記主面と前記対向基板の前記下面を中空状態で接合する接合部材と、前記対向基板の前記上面に形成された回路及びバンプ構造とを備え、前記バンプ構造は、前記回路よりも高さが高く、前記接合部材は、前記デバイスを囲むように形成された封止枠を有し、前記封止枠に対応する領域に配置された前記バンプ構造は、平面視で前記デバイスを囲むように形成されていることを特徴とする。
本発明では、対向基板の上面に回路及びバンプ構造が形成され、バンプ構造は、少なくとも接合部材に対応した位置に配置され、回路よりも高さが高い。これにより、基板と対向基板を張り合わせる際に、高さの低い回路は定盤に接しないため、回路を保護することができる。また、上側の定盤からの荷重が回路に分散されることなく、バンプ構造を介して接続バンプ及び封止枠に直線的に伝わる。従って、十分な荷重を加えることができるため、対向基板と接合部材の密着性を確保することができる。この結果、信頼性を向上させることができる。
実施の形態１に係る基板貼り合わせ構造を示す上面図である。 図１のＩ−ＩＩに沿った断面図である。 図１のＩＩＩ−ＩＶに沿った断面図である。 実施の形態１に係る基板を示す上面図である。 実施の形態１に係る対向基板を示す下面図である。 エアブリッジとバンプ構造の関係を示す断面図である。 エアブリッジとバンプ構造の関係を示す断面図である。 実施の形態１に係る基板側の製造工程の一例を示す断面図である。 実施の形態１に係る基板側の製造工程の一例を示す断面図である。 実施の形態１に係る基板側の製造工程の一例を示す断面図である。 実施の形態１に係る基板側の製造工程の一例を示す断面図である。 実施の形態１に係る基板側の製造工程の他の例を示す断面図である。 実施の形態１に係る基板側の製造工程の他の例を示す断面図である。 実施の形態１に係る基板側の製造工程の他の例を示す断面図である。 実施の形態１に係る対向基板側の製造工程を示す断面図である。 実施の形態１に係る対向基板側の製造工程を示す断面図である。 実施の形態１に係る対向基板側の製造工程を示す断面図である。 実施の形態１に係る対向基板側の製造工程を示す断面図である。 実施の形態１に係る基板と対向基板の貼り合わせ工程を示す断面図である。 比較例１に係る基板と対向基板の貼り合わせ工程を示す断面図である。 比較例２に係る基板と対向基板の貼り合わせ工程を示す断面図である。 実施の形態１に係る基板貼り合わせ構造の変形例を示す断面図である。 実施の形態２に係る基板貼り合わせ構造の主要部を示す断面図である。 実施の形態３に係る基板貼り合わせ構造の主要部を示す断面図である。 実施の形態３に係る基板貼り合わせ構造のバンプ構造と接合部材の位置関係を示す平面図である。
実施の形態に係る基板貼り合わせ構造及び基板貼り合わせ方法について図面を参照して説明する。同じ又は対応する構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。
実施の形態１．
図１は、実施の形態１に係る基板貼り合わせ構造を示す上面図である。図２は、図１のＩ−ＩＩに沿った断面図である。図３は、図１のＩＩＩ−ＩＶに沿った断面図である。図４は、実施の形態１に係る基板を示す上面図である。図５は、実施の形態１に係る対向基板を示す下面図である。ここでは、基板貼り合わせ構造をＧａＮ−ＨＥＭＴトランジスタを用いた電力増幅器に適用した例を説明する。ただし、この例で示すトランジスタ、回路、基板種類などに限定されない。また、材料及びサイズは一例であって使用範囲を限定するものではない。
基板１は例えばＳｉＣ又はＳｉの単結晶基板上にＧａＮ−ＡｌＧａＮ層をヘテロエピタキシャル成長したものである。基板１の主面の中央にＨＥＭＴトランジスタであるデバイス２が形成されている。封止枠受けパッド３がデバイス２を囲むように形成されている。
デバイス２は、ゲート電極４と、ソース電極５と、ドレイン電極６と、ゲート電極４に接続されたゲートパッド７と、ドレイン電極６に接続されたドレインパッド８とを有する。ソース電極５がソースパッドも兼ねている。ゲートパッド７から信号電圧を入力し、ソース電極５から電流を供給し、ドレインパッド８から信号電流を出力する。
ゲート電極４の一本の幅は５０〜５００μｍ程度であり、必要出力に応じて複数本を横に平行に並べる。ここではゲート電極４を２本並べた場合を示すが、実際には２本〜１００本程度並べる。デバイス２の大きさは、１本のゲート幅とゲート本数によって異なるが、１本のゲート幅が５００μｍ、ゲート本数が７０本の場合に縦１ｍｍ、横３ｍｍ程度である。ゲート電極４の横幅であるゲート長が細いほど信号特性が良い。例えば、ゲート電極４は０．１〜１．０μｍの横幅で、２０ｎｍ厚のＴｉ膜と２００ｎｍ厚のＡｌ膜を順に蒸着法で形成した２層構造である。ドレイン電極６及びソース電極５は、基板１のＧａＮエピタキシャル層とオーミック接合し、５０ｎｍ厚のＮｉ膜と５００ｎｍ厚のＡｕ膜を蒸着法で形成した上にめっきで１〜１０μｍ厚のＡｕ膜を形成したものである。Ａｕ膜の厚さは電極に流す電流に応じて選定する。ゲートパッド７とドレインパッド８は５００ｎｍ厚のＴｉ膜と１〜１０μｍ厚のＡｕ膜で形成し、ドレイン電極６とゲート電極４にそれぞれ接続している。
基板１を貫通するビア９が基板１の裏面側からドライエッチングにより形成されている。基板１の厚さは５０〜１００μｍ程度、ビア９の径は５０〜１００μｍΦである。ビア９内及び基板１の裏面に裏面電極１０が形成されている。裏面電極１０は、５０ｎｍ厚のＴｉ膜と２００ｎｍ厚のＡｕ膜のスパッタ膜等のシード膜上に、ビア９内に流す電流に応じて１〜１０μｍ厚のＡｕめっきを形成したものである。
ゲートパッド７及びドレインパッド８上にそれぞれ接続バンプ１１，１２が形成されている。封止枠受けパッド３上に封止枠１３が形成されている。封止枠１３はソース電極５に接続されている。基板１の主面と対向基板１４の下面が接続バンプ１１，１２及び封止枠１３を介して中空状態で接合されている。即ち、基板１の主面と対向基板１４の下面の間が離れていてデバイス２の上に空間が構成され、接続バンプ１１，１２及び封止枠１３により支持されている。封止枠１３がデバイス２を囲んでこの空間を気密封止することで信頼性が向上する。なお、封止枠１３は必ずしも形成する必要はない。接続バンプ１１，１２及び封止枠１３の高さは、基板１側のデバイス２と対向基板１４が接触しないように設定され、例えば１０μｍ程度である。
対向基板１４は、サファイア、ガラス、ＩｎＰ、ＳｉＣ、ＧａＡｓなどの絶縁基板、又はＳｉ高抵抗基板などである。この対向基板１４の上面にＭＩＭキャパシタ１５及びスパイラルインダクタ１６を有する回路１７、ゲート引出し電極１８、ドレイン引出し電極１９が形成されている。回路１７は整合回路であり、ここではトランジスタの入力側に接続された高調波処理回路である。回路１７は５０ｎｍ厚のＴｉ膜と１μｍ厚のＡｕ膜の蒸着膜と、１〜５μｍ厚のＡｕめっき膜で構成する。
対向基板１４を貫通するビア２０，２１，２２が対向基板１４の裏面側からドライエッチングにより形成されている。対向基板１４の厚さは５０〜１００μｍ程度、ビア２０，２１，２２の径は５０〜１００μｍΦである。ビア２０内に電極２３が形成されている。ビア２１内及び対向基板１４の裏面にシールド電極２４が形成されている。ビア２２内に電極２５が形成されている。電極２３，２５及びシールド電極２４は、５０ｎｍ厚のＴｉ膜と２００ｎｍ厚のＡｕ膜のスパッタ膜等のシード膜上に、ビア２０，２１，２２内に流す電流に応じて１〜５μｍ厚のＡｕめっきを形成したものである。ゲート・ドレインに接続する接続バンプ１１，１２をシールド電極２４から絶縁するため、めっき膜とスパッタ膜の形成後に電極２３，２５とシールド電極２４はパターニングにより分離されている。
ゲート引出し電極１８は電極２３と接続バンプ１１を介して基板１側のゲートパッド７に接続されている。ゲート引出し電極１８は、別途、ＭＩＭキャパシタ１５、スパイラルインダクタ１６を介してシールド電極２４に接続されている。このシールド電極２４は封止枠１３及びソース電極５を介してグランドである裏面電極１０に接続される。このゲート引出し電極１８からグランドまでの回路により高調波処理が可能となる。また、基板１側のデバイス２から生じる電磁波が中空部から外に出ないようにシールド電極２４がシールドしている。
ドレイン引出し電極１９は電極２５と接続バンプ１２を介して基板１側のドレインパッド８に接続されている。ゲート引出し電極１８にはワイヤボンドにより信号を入力し、ドレイン引出し電極１９からワイヤボンドにより信号を出力する。このように基板１のデバイス２と対向基板１４の回路１７は接続バンプ１１，１２及び封止枠１３を介して互いに接続されている。
バンプ構造２６が対向基板１４の上面に１０μｍ程度のＡｕめっきで形成されている。バンプ構造２６は、少なくとも接続バンプ１１，１２及び封止枠１３に対応する領域に配置され、回路１７よりも高さが高い。
図６及び図７は、エアブリッジとバンプ構造の関係を示す断面図である。例えば、回路１７がＧａＮ−ＨＥＭＴの電力増幅器の整合回路の場合、エアブリッジ２７と呼ばれる配線の交差部がある。配線間の容量を低減するためエアブリッジ２７で配線間を空気層を介して３μｍ程度隔てられているため、エアブリッジ２７は周辺の配線より３μｍ高くなっている。バンプ構造２６はこのエアブリッジ２７より高く作る必要がある。図６のように蒸着膜２８及びめっき膜２９の積層構造上にバンプ構造２６を形成する場合、バンプ構造２６の高さを３μｍより大きくする必要がある。図７のように蒸着膜２８上にバンプ構造２６を形成する場合、バンプ構造２６の高さをめっき厚＋３μｍより大きくする必要がある。ここでは、対向基板１４の上面のみに回路１７を形成し、裏面にはシールド電極２４のみを形成した場合を示したが、対向基板１４の裏面に別の回路を形成してもよい。また、上面の回路１７としてＭＩＭキャパシタ１５とスパイラルインダクタ１６をレイアウトした例を示したが、エレメント同士を電気的につなぐ配線構造、エレメント同士をつなぐ接続部も回路１７に含まれる。
続いて、本実施の形態に係る基板貼り合わせ方法を説明する。図８から図１１は、実施の形態１に係る基板側の製造工程の一例を示す断面図である。これらの図は図４のＩＩＩ−ＩＶに沿った断面図に対応する。この例では接続バンプ１１，１２及び封止枠１３をＡｕめっきで形成する。なお、接続バンプ１１，１２及び封止枠１３を蒸着リフトオフによるパターニングプロセスで形成してもよい。
まず、図８に示すように、基板１の主面に、ドレイン電極６等を有するデバイス２、ゲートパッド７、ドレインパッド８、及び封止枠受けパッド３を受けパッドとして形成する。なお、基板１にビア９及び裏面電極１０も形成するが、図８から図１４ではビア９及び裏面電極１０の図示は省略している。なお、ゲートパッド７、ドレインパッド８、ドレイン電極６をそれぞれ同一の厚さで記載しているが、簡易的に示したもので、実際にはドレイン電極６はオーミック層が下層に含まれるため、他の電極より厚い。ゲートパッド７、ドレインパッド８、及び封止枠受けパッド３は必ずしも必要ないが、接続バンプ１１，１２及び封止枠１３の下地として形成することが望ましい。これにより、接続バンプ１１，１２及び封止枠１３の高さが揃って接合性が良くなる。また、デバイス２の電極の何れかをパッドとして使用することで両者の電気的な接続が容易になる。
受けパッドは、基板１と密着の良いＴｉなどの材料と、接続バンプ１１，１２及び封止枠１３に密着のよい材料を蒸着などで連続成膜する。例えば接続バンプ１１，１２及び封止枠１３をＡｕで形成する場合、受けパッドをＴｉ／Ａｕの連続成膜で形成する。また、受けパッドは、デバイス形成中にデバイス２の電極と同時に形成する。なお、ドレイン電極６の下層にオーミック電極としてＮｉ／Ａｕなどがデバイスを構成するために必要である。ただし、接続バンプ１１，１２及び封止枠１３の高さが揃っていないと接合が安定しないため受けパッドの層構成は同じであることが望ましい。
次に、図９に示すように、下層レジスト３０を形成してパターニングする。次に、めっきの給電層３１を全面に形成する。次に、図１０に示すように、上層レジスト３２を形成してパターニングする。
次に、電気めっきにより上層レジスト３２の開口部分のみにＡｕめっき膜を形成する。なお、ウェハのＡｕめっきでは、めっき液を循環しウェハ表面で液流を均一にし、電界もウェハ面内で均一になるように装置を構成することでめっき厚の面内分布を均一化する。めっき厚がばらつくと良好な接合を得ることができないため、このめっき工程は重要である。その後、上層レジスト３２、給電層３１、及び下層レジスト３０を除去することで、図１１に示すように接続バンプ１１，１２及び封止枠１３を得る。
図１２から図１４は、実施の形態１に係る基板側の製造工程の他の例を示す断面図である。この例では金属粒子ペーストを用いて接続バンプ１１，１２及び封止枠１３を形成する。金属粒子ペーストは金属粒子を溶剤と混合した材料である。
まず、図８と同様に基板１の主面にデバイス２、ゲートパッド７、ドレインパッド８、及び封止枠受けパッド３を形成する。次に、別の転写用基板３３を準備して、転写用基板３３上に接続バンプ１１，１２及び封止枠１３に対応したパターンを形成する。形成方法はレジスト又はマスクを使用して金属粒子ペーストをパターン内に充填した後にレジスト又はマスクを除去する方法などがある。パターン形成後にベーキングを行いペースト剤に含まれる溶剤成分を揮発させる。ベーキングの温度は、Ａｕペーストの場合１００〜２００℃程度である。これにより金属粒子が凝集した構造物が形成されるが、この段階では一体化しているわけではなく、粒子間には多くの空隙が存在する。なお、粒子と空隙の体積比はＡｕ粒子ペーストの場合、１：１程度であることが実験的に分かっている。
次に、図１３に示すように、基板１上のパターンと転写用基板３３上のパターンのアライメントを行った後に加熱し、基板１と転写用基板３３を両側から加圧して接続バンプ１１，１２及び封止枠１３を基板１側のパッドに接合する。加圧する際に金属粒子ペーストからなる接続バンプ１１，１２及び封止枠１３は圧縮変形し、空隙が減少する。この変形量は、加圧時の圧力と温度により変動するが、例えば、Ａｕ粒子ペーストを３０ＭＰａ、１５０℃で加圧した場合、もともとの高さの０〜２０％程度である。２０μｍ高さのパターンの場合、０〜４μｍ程度縮む。これにより、受けパッドの高さの不均一又は表面のミクロンレベルの凹凸に対して柔軟に変形して密着することができる。例えば、受けパッドをめっきで１０μｍ厚に形成した場合、パターンサイズ又はウェハの面内分布により数μｍの高さ分布が出てしまうが、受けパッド上に形成された金属粒子ペーストパターンがそれらを吸収して高さを均一化することができる。また、例えば、受けパッド３が１０μｍ厚のめっき膜であり、ゲートパッド７とドレインパッド８が２μｍ厚の蒸着膜と１０μｍ厚のめっき膜を積層したものである場合にも、ペースト剤の収縮量がそれぞれで変化することにより、パッドを含む全体の高さを均一化することができる。高さが均一化することで、基板１と対向基板１４を接合した際に密着性、封止性、電気的接続性が向上する。
最後に転写用基板３３を外すことで基板側の製造工程が完了する。金属粒子ペースト剤と密着性の低いＴｉ等の材料を基板表面にコーティングしておくと、転写用基板３３が外れやすくなる。なお、金属粒子ペーストパターンは、基板１の主面側に限らず、対向基板１４の下面側に形成してもよい。
図１５から図１８は、実施の形態１に係る対向基板側の製造工程を示す断面図である。まず、図１５に示すように、対向基板１４の上面に回路１７を形成する。ここでは、回路１７を単層の金属パターンで示しているが、実際には複数の金属パターンで構成される。また、パターン間の絶縁又は耐湿信頼性の向上のため、シリコン酸化膜などの絶縁膜をＣＶＤ法などで形成するが、図示を省略している。
次に、図１６に示すように、対向基板１４の下面を研削、ポリッシュして薄板化する。対向基板１４の下面側からドライエッチング等でビア２０，２１，２２を形成し、スパッタ法で給電層を形成した後、めっきで厚膜の電極３４を形成する。次に、図１７に示すように、レジストでパターニングして電極３４の不要部をエッチングすることで電極２３，２５とシールド電極２４が形成される。
次に、図１８に示すように、対向基板１４の上面にバンプ構造２６を形成する。バンプ構造２６は、接続バンプ１１，１２及び封止枠１３に対応したパターンで、回路１７よりも高さが高くなるように形成する。なお、バンプ構造２６の形成は回路１７の形成直後に行ってもよく、ビア２０，２１，２２の下面からのエッチング形成、電極３４の形成もあくまで一例として示している。
図１９は、実施の形態１に係る基板と対向基板の貼り合わせ工程を示す断面図である。まず、ウェハ状態の基板１の主面とウェハ状態の対向基板１４の下面をアライメントする。そして、上下から平坦で平行な定盤で加圧と加熱を行なって基板１と対向基板１４を貼り合わせる。この際に、回路１７に接触しないように定盤でバンプ構造２６を加圧して基板１の主面と対向基板１４の下面とを接続バンプ１１，１２及び封止枠１３を介して接合する。接続バンプ１１，１２及び封止枠１３の上面と対向基板１４の裏面の電極２３，２５とシールド電極２４との密着面は平坦であり、両者を高温かつ高圧力下において接合する。ＡｒとＯ２のプラズマ処理を行なって表面を清浄化し、超音波振動を加えることで密着性を上げることができる。両者の材料として溶解温度に達する前に接合する金属を選択してもよい。例えば、固溶反応の起きやすい金属同士としてＡｕとＩｎなどがあり、Ａｕ，Ｐｔ，Ａｇ，Ｐｄなどの貴金属は同一の金属表面同士でも接合できる。
図１３の工程と同様の条件で加圧と加熱を行なう。これにより、金属粒子ペーストからなる接続バンプ１１，１２及び封止枠１３の空隙が更に狭くなり、金属粒子同士が更に密着して、金属の溶解温度に達することなく粒子の表面同士が接合してバルク化する。例えば、Ａｕ粒子ペーストは２００℃、１００ＭＰａでバルク化する。もともと２０μｍ高さのパターンの場合、接合により１０μｍ程度に圧縮される。
続いて、本実施の形態の効果を比較例１，２と比較して説明する。図２０は、比較例１に係る基板と対向基板の貼り合わせ工程を示す断面図である。バンプ構造２６が無いため、回路１７のエアブリッジ２７などに定盤が接触して損傷、変形してしまう場合がある。
これに対して、本実施の形態では、対向基板１４の上面にバンプ構造２６が形成され、バンプ構造２６は、少なくとも接続バンプ１１，１２及び封止枠１３に対応した位置に配置され、回路１７よりも高さが高い。これにより、基板１と対向基板１４を張り合わせる際に、高さの低い回路１７は定盤に接しないため、回路１７を保護することができる。また、上側の定盤からの荷重が回路１７に分散されることなく、バンプ構造２６を介して接続バンプ１１，１２及び封止枠１３に直線的に伝わる。従って、十分な荷重を加えることができるため、対向基板１４と接続バンプ１１，１２及び封止枠１３の密着性を確保することができる。この結果、信頼性を向上させることができる。
対向基板１４と接続バンプ１１，１２の密着性を確保することで両者の電気的接続の信頼性を高めることができる。また、対向基板１４と封止枠１３の密着性を確保することで、デバイスの気密封止性を高めることができる。なお、電気接続のために接続バンプ１１，１２に印加する圧力は、気密封止性を高めるために封止枠１３に印加する圧力より低くてもよい。従って、封止枠１３に対応する領域にバンプ構造２６を優先的に設けて、接合時の圧力を接続バンプ１１，１２よりも封止枠１３に強く印加してもよい。
図２１は、比較例２に係る基板と対向基板の貼り合わせ工程を示す断面図である。接続バンプ１１に対応する領域にバンプ構造２６が無い部分がある。この部分の接続バンプ１１には定盤からの圧力が直線的に伝わらないため、接合圧力が低くなり、接合が不十分となる。また、対向基板１４が変形してクラックなどが生じる可能性もある。従って、全ての接続バンプ１１，１２及び封止枠１３に対応する領域にバンプ構造２６が配置されていることが好ましい。
図２２は、実施の形態１に係る基板貼り合わせ構造の変形例を示す断面図である。バンプ構造２６が接続バンプ１１，１２及び封止枠１３に対応する領域に配置されていれば上記の効果を得ることができ、バンプ構造２６の一部が接続バンプ１１，１２及び封止枠１３に対応する領域以外にも部分的に配置されていてもよい。ただし、バンプ構造２６が接続バンプ１１，１２及び封止枠１３に対応する領域以外に配置されていないことが好ましい。これにより、対向基板１４に対する上下の圧力に不均一が生じないため、対向基板１４の割れ又はクラックを防ぐことができる。
また、金属ペースト剤で接続バンプ１１，１２及び封止枠１３を形成することで、接合前の高さを均一化することができる。このため、ウェハ面内で安定して接合できる。また、下地の受けパッドの高さに差がある場合でも接続バンプ１１，１２及び封止枠１３の高さを均一化できる。このため、デバイス２に対する制約が少ない。例えば、オーミック電極のあるドレイン電極上に接合バンプを作ると同時にオーミック電極を作れないゲートパッド上に接合バンプを形成することもできる。さらに、金属粒子ペーストは金属粒子で構成されるため、めっきなどで形成されたバルク金属に比べて表面積が大きく、比較的低温、低圧での接合が可能である。低温、低圧で接合することで、高温に耐えられないデバイス２を形成することができる。
実施の形態２．
図２３は、実施の形態２に係る基板貼り合わせ構造の主要部を示す断面図である。バンプ構造２６は、断面積が接続バンプ１１等より小さく、接続バンプ１１等に対応する領域と同じか又はそれより内側に配置されている。即ち、バンプ構造２６は、接続バンプ１１等に対応する領域内のみに配置されている。これにより、接合時にバンプ構造２６に加わる力が全て接続バンプ１１等に加わるため、電気接続の信頼性を高めることができる。
実施の形態３．
図２４は、実施の形態３に係る基板貼り合わせ構造の主要部を示す断面図である。本実施の形態では、基板１の主面と対向基板１４の上面及び下面に沿った方向を横方向として、バンプ構造２６と接続バンプ１１等の横方向の重心位置が一致する。これにより、バンプ構造２６と接続バンプ１１等から対向基板１４に加わる力によりモーメントが生じないため、対向基板１４を変形させる力が働きにくく、クラックなどによる対向基板１４の損傷が起きにくい。
図２５は、実施の形態３に係る基板貼り合わせ構造のバンプ構造と接合部材の位置関係を示す平面図である。バンプ構造２６と接続バンプ１１等の横方向の重心位置が一致すれば上記の効果が得られ、図２５の左側の図のようにバンプ構造２６と接続バンプ１１等のパターン形状が違っていてもよいし、右側の図のように互いの分割数が異なってもよい。これによりバンプ構造２６と接続バンプ１１等の設計の自由度が高まる。
１ 基板、２ デバイス、１１，１２ 接続バンプ（接合部材）、１３ 封止枠（接合部材）、１４ 対向基板、１７ 回路、２６ バンプ構造

Claims (8)

  1. 主面を持つ基板と、
    前記基板の前記主面に形成されたデバイスと、
    前記主面に対向する下面と、前記下面とは反対側の上面とを持つ対向基板と、
    前記基板の前記主面と前記対向基板の前記下面を中空状態で接合する接合部材と、
    前記対向基板の前記上面に形成された回路及びバンプ構造とを備え、
    前記バンプ構造は、前記回路よりも高さが高く、
    前記接合部材は、前記デバイスを囲むように形成された封止枠を有し、
    前記封止枠に対応する領域に配置された前記バンプ構造は、平面視で前記デバイスを囲むように形成されていることを特徴とする基板貼り合わせ構造。
  2. 前記バンプ構造は、少なくとも前記接合部材に対応する領域に配置されていることを特徴とする請求項１に記載の基板貼り合わせ構造。
  3. 前記接合部材は、前記デバイスと前記回路を接続する接続バンプを有することを特徴とする請求項１又は２に記載の基板貼り合わせ構造。
  4. 主面を持つ基板と、
    前記基板の前記主面に形成されたデバイスと、
    前記主面に対向する下面と、前記下面とは反対側の上面とを持つ対向基板と、
    前記基板の前記主面と前記対向基板の前記下面を中空状態で接合する接続バンプと、
    前記対向基板の前記上面に形成された回路及びバンプ構造とを備え、
    前記接続バンプは前記デバイスと前記回路を接続し、
    前記バンプ構造は、少なくとも前記接続バンプに対応する領域に配置され、前記回路よりも高さが高く、
    前記バンプ構造の少なくとも１つは、対応する前記接続バンプと平面視の形状が異なり、対応する前記接続バンプと平面視の重心位置が一致することを特徴とする基板貼り合わせ構造。
  5. 主面を持つ基板と、
    前記基板の前記主面に形成されたデバイスと、
    前記主面に対向する下面と、前記下面とは反対側の上面とを持つ対向基板と、
    前記基板の前記主面と前記対向基板の前記下面を中空状態で接合する接続バンプと、
    前記対向基板の前記上面に形成された回路及びバンプ構造とを備え、
    前記接続バンプは前記デバイスと前記回路を接続し、
    前記バンプ構造は、少なくとも前記接続バンプに対応する領域に配置され、前記回路よりも高さが高く、
    前記バンプ構造の少なくとも１つは、複数の部材で構成され、対応する前記接続バンプと平面視の重心位置が一致することを特徴とする基板貼り合わせ構造。
  6. 基板の主面にデバイスを形成する工程と、
    前記基板の前記主面に接合部材を形成する工程と、
    対向基板の上面に、回路と、少なくとも前記接合部材に対応した位置に配置され前記回路よりも高さが高いバンプ構造とを形成する工程と、
    前記回路に接触しないように定盤で前記バンプ構造を加圧して前記基板の前記主面と前記対向基板の下面とを前記接合部材を介して中空状態で接合する工程とを備えることを特徴とする基板貼り合わせ方法。
  7. 前記接合部材をめっきで形成することを特徴とする請求項６に記載の基板貼り合わせ方法。
  8. 前記接合部材を金属粒子ペーストで形成することを特徴とする請求項６に記載の基板貼り合わせ方法。
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