JP6224292B2 - 半導体装置および半導体モジュール - Google Patents
半導体装置および半導体モジュール Download PDFInfo
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- JP6224292B2 JP6224292B2 JP2017511405A JP2017511405A JP6224292B2 JP 6224292 B2 JP6224292 B2 JP 6224292B2 JP 2017511405 A JP2017511405 A JP 2017511405A JP 2017511405 A JP2017511405 A JP 2017511405A JP 6224292 B2 JP6224292 B2 JP 6224292B2
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- 239000004065 semiconductor Substances 0.000 title claims description 134
- 230000005684 electric field Effects 0.000 claims description 156
- 239000000758 substrate Substances 0.000 claims description 130
- 239000003566 sealing material Substances 0.000 claims description 124
- 229910052751 metal Inorganic materials 0.000 claims description 47
- 239000002184 metal Substances 0.000 claims description 47
- 239000011347 resin Substances 0.000 claims description 17
- 229920005989 resin Polymers 0.000 claims description 17
- 229920002614 Polyether block amide Polymers 0.000 claims description 7
- 239000004962 Polyamide-imide Substances 0.000 claims description 3
- 150000003949 imides Chemical class 0.000 claims description 3
- 229920002312 polyamide-imide Polymers 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 235
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 131
- 229910010271 silicon carbide Inorganic materials 0.000 description 130
- 238000004519 manufacturing process Methods 0.000 description 92
- 238000000034 method Methods 0.000 description 66
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 61
- 229910052814 silicon oxide Inorganic materials 0.000 description 61
- 230000008569 process Effects 0.000 description 35
- 230000015556 catabolic process Effects 0.000 description 31
- 238000000059 patterning Methods 0.000 description 25
- 229910052581 Si3N4 Inorganic materials 0.000 description 19
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 19
- 229920001721 polyimide Polymers 0.000 description 18
- 238000000576 coating method Methods 0.000 description 16
- 239000000463 material Substances 0.000 description 15
- 239000004642 Polyimide Substances 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 238000010438 heat treatment Methods 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 238000012360 testing method Methods 0.000 description 14
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 13
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 12
- 230000015572 biosynthetic process Effects 0.000 description 12
- 239000011248 coating agent Substances 0.000 description 12
- 229920001296 polysiloxane Polymers 0.000 description 12
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 10
- 229910052799 carbon Inorganic materials 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 9
- 238000007689 inspection Methods 0.000 description 9
- 238000000206 photolithography Methods 0.000 description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 8
- 239000000565 sealant Substances 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 230000007547 defect Effects 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 7
- 229910021334 nickel silicide Inorganic materials 0.000 description 6
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 6
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- SECXISVLQFMRJM-UHFFFAOYSA-N N-Methylpyrrolidone Chemical compound CN1CCCC1=O SECXISVLQFMRJM-UHFFFAOYSA-N 0.000 description 4
- 230000004913 activation Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910010272 inorganic material Inorganic materials 0.000 description 4
- 239000011147 inorganic material Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 239000012298 atmosphere Substances 0.000 description 3
- 239000013522 chelant Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000002674 ointment Substances 0.000 description 3
- 239000009719 polyimide resin Substances 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 230000002040 relaxant effect Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 239000012812 sealant material Substances 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- PNDPGZBMCMUPRI-UHFFFAOYSA-N iodine Chemical compound II PNDPGZBMCMUPRI-UHFFFAOYSA-N 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
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Description
ウェハ(基板)900状態で、スクライブ領域901上とその近傍に耐高電界封止材902を形成する。形成方法は,ディスペンサーによってペースト状の耐高電界封止材材料701を格子状に塗布して、耐高電界封止材902を形成することで行う。スクライブ領域901で囲まれる1つが、ダイシング後にチップ1000となる。
302 ターミネーション領域
303 SiC基板
304 エピ層
305 ニッケル珪化物層
306 メタル積層膜
307 p領域
308 n領域
310 酸化シリコンを主成分とする層
311 電極メタル層
312 無機材料保護膜
313 ポリイミド層
402 耐高電界封止材
501 絶縁基板
503 ボンディングワイヤ
505 シリコーンゲル
701 耐高電界封止材
702 ディスペンサーのノズル
901 スクライブ領域
1101 ダイシングブレード
1201 SiC基板
1202 エピ層
1301 ターミネーション領域
1302 p領域
1401 酸化シリコンを主成分とする層
1402,1403 酸化シリコンを主成分とする層の開口部
1601,1602 電極メタル層
1701 酸化シリコンを主成分とする層
1801 ポリイミド層
1901 ニッケル珪化物層
2001 電極メタル層
2102 耐高電界封止材
2201 ダイシングブレード
2300 SiCダイオードチップ
3102 カーボン治具とチップ端面の耐高電界封止材の接触部
3301 Si−IGBTチップ
3401 電極主端子
3402 ケース
3403 カバー
3701 SiC−MOSチップ
3702 ゲート電極パッド
Claims (15)
- ワイドギャップ半導体素子が形成された半導体チップで構成される半導体装置であって,
前記半導体チップは,
半導体基板と,
前記半導体基板に形成された電極メタル層と,
前記半導体基板と前記電極メタル層との間,または,前記電極メタル層の上に延伸し,端部が前記半導体チップ端部よりも内側に存在する無機絶縁膜層と,
前記電極メタル層の一部を除き,前記半導体チップ端部までを覆う耐高電界封止材層と,
を有し、
前記耐高電界封止材層は,前記無機絶縁膜層と接していないことを特徴とする半導体装置。 - 前記請求項1において,
前記耐高電界封止材層として,ポリアミドイミド樹脂,ポリエーテルアミドイミド樹脂,ポリエーテルアミド樹脂の中から一種あるいは複数からなる構成を用いることを特徴とする半導体装置。 - 前記請求項1において,
前記耐高電界封止材層の膜厚が,少なくとも50μm以上で,かつ500μm以下とすることを特徴とする半導体装置。 - 前記請求項1において,
前記耐高電界封止材層のチップ端における主たる面が,前記半導体基板表面と80度〜100度の角度を有することを特徴とする半導体装置。 - 前記請求項1において,
前記耐高電界封止材層のチップ端における主たる面が,前記半導体基板の端面との段差が50μm以下であることを特徴とする半導体装置。 - 前記請求項1において,
前記無機絶縁膜層の端部と前記半導体チップ端部との距離が,10μm以上,300μm以下であることを特徴とする半導体装置。 - 前記請求項1において,
前記半導体基板に形成される合わせマークとなる凹部が,前記無機絶縁膜層の下部に形成されていることを特徴とする半導体装置。 - 前記請求項1において,
前記無機絶縁膜層の合わせを検査するバーニアが,形成されていることを特徴とする半導体装置。 - 半導体ウェハからダイシングによって切り出される,半導体素子が形成された半導体チップで構成される半導体装置であって,
前記半導体チップは,
半導体基板と,
前記半導体基板に形成されたメタル層と,
前記メタル層に接して形成された無機絶縁膜層と,
前記半導体チップ端部を少なくとも覆う耐高電界封止材層を有し,
前記ダイシングによる切断面には,前記無機絶縁膜層が存在しないように構成され、
前記耐高電界封止材層は,前記無機絶縁膜層と接していないことを特徴とする半導体装置。 - 前記無機絶縁膜層と前記耐高電界封止材層の間に形成された有機絶縁膜層を有し,
前記耐高電界封止材層は,前記有機絶縁膜層を覆うともに,前記メタル層の一部を電極として露出させていることを特徴とする請求項9記載の半導体装置。 - 前記ダイシングによる切断面には,前記有機絶縁膜層が存在しないように構成されていることを特徴とする請求項10記載の半導体装置。
- 前記耐高電界封止材層の前記半導体チップ端における主たる面が,前記半導体基板表面と80度〜100度の角度を有することを特徴とする請求項9記載の半導体装置。
- 前記耐高電界封止材層のチップ端における主たる面が,前記半導体基板の端面との段差が50μm以下であることを特徴とする請求項9記載の半導体装置。
- 前記無機絶縁膜層の端部と前記半導体チップ端部との距離が,10μm以上,300μm以下であることを特徴とする請求項9記載の半導体装置。
- ワイドギャップ半導体を用いた半導体装置と、
前記半導体装置が搭載される基礎基板と、
前記半導体装置および基礎基板を格納する筐体を有し,
前記半導体装置は,
半導体基板と、前記半導体基板に形成された電極メタル層と,前記半導体基板と前記電極メタル層との間に延伸している無機絶縁膜層を備える半導体チップを有し,
前記無機絶縁膜層の端部が前記半導体チップ端部よりも内側に存在し,前記半導体チップ端部に達する耐高電界封止材層が形成されており、
前記耐高電界封止材層が前記無機絶縁膜層と直接接しないよう,有機絶縁膜層が配置されていることを特徴とする半導体モジュール。
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DE102017107952B4 (de) * | 2017-04-12 | 2022-07-07 | Infineon Technologies Ag | Herstellungsverfahren für eine halbleitervorrichtung |
JP6892997B2 (ja) * | 2017-07-31 | 2021-06-23 | 国立研究開発法人産業技術総合研究所 | 半導体装置 |
CN112640048A (zh) | 2018-08-10 | 2021-04-09 | 罗姆股份有限公司 | SiC半导体装置 |
US11508638B2 (en) * | 2018-08-17 | 2022-11-22 | Mitsubishi Electric Corporation | Semiconductor device and power converter |
EP3905317B1 (en) | 2018-12-26 | 2022-10-05 | NISSAN MOTOR Co., Ltd. | Semiconductor device |
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