JP6111818B2 - 半導体素子、半導体素子の製造方法 - Google Patents
半導体素子、半導体素子の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 63
- 238000000034 method Methods 0.000 title claims description 14
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims description 106
- 239000013078 crystal Substances 0.000 claims description 31
- 229910052737 gold Inorganic materials 0.000 claims description 9
- 229910052697 platinum Inorganic materials 0.000 claims description 7
- 229910052719 titanium Inorganic materials 0.000 claims description 7
- 238000001312 dry etching Methods 0.000 claims description 5
- 238000000992 sputter etching Methods 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052741 iridium Inorganic materials 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 229910052707 ruthenium Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 229910052712 strontium Inorganic materials 0.000 claims description 3
- 229910052727 yttrium Inorganic materials 0.000 claims description 3
- 229910052726 zirconium Inorganic materials 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- 229910052593 corundum Inorganic materials 0.000 claims description 2
- 239000010431 corundum Substances 0.000 claims description 2
- 229910052758 niobium Inorganic materials 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 229910052720 vanadium Inorganic materials 0.000 claims description 2
- 230000005856 abnormality Effects 0.000 description 13
- 229910002704 AlGaN Inorganic materials 0.000 description 5
- 238000002441 X-ray diffraction Methods 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000011156 evaluation Methods 0.000 description 4
- 238000000879 optical micrograph Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000000026 X-ray photoelectron spectrum Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 229910018516 Al—O Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 238000001420 photoelectron spectroscopy Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
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Description
図1は、本発明の実施の形態1に係る半導体素子の断面図である。この半導体素子は六方晶で基板面が(0001)面である基板10を備えている。基板10は例えばAl2O3の単結晶基板で形成されている。基板10の基板面の上には複数の導電膜12が形成されている。複数の導電膜12は、第1導電膜14と、第1導電膜14の上方に形成された第2導電膜16を備えている。
本発明の実施の形態2に係る半導体素子は、実施の形態1との共通点が多いので実施の形態1との相違点を中心に説明する。図12は、本発明の実施の形態2に係る半導体素子の断面図である。基板10の上に中間導電膜30が形成されている。中間導電膜30の結晶構造は、基板10の基板面における原子配列と同等の対称性を有する平面を少なくとも1つ有する。中間導電膜30は例えばAuで形成されている。第1導電膜14の上に、第2導電膜16Aが形成されている。第2導電膜16Aの上に第2導電膜16Bが形成されている。つまり、複数の導電膜32は、中間導電膜30、第1導電膜14、第2導電膜16A、及び第2導電膜16Bを有している。
図13は、本発明の実施の形態3に係る半導体素子の断面図である。この半導体素子は、基板10の上に形成されたアモルファス層40を備えている。アモルファス層40の上にはアモルファス上導電膜42が形成されている。アモルファス上導電膜42は例えばAu、又はTi/Auである。アモルファス上導電膜42は、粒径が15μm以下の多結晶である。また、アモルファス上導電膜42の結晶構造は、基板10の基板面における原子配列と同等の対称性を有する平面を少なくとも1つ有する。
本発明の実施の形態4に係る半導体素子と半導体素子の製造方法は、実施の形態3との共通点が多いので実施の形態3との相違点を中心に説明する。図20は、本発明の実施の形態4に係る半導体素子の断面図である。基板10とアモルファス層40の間には中間導電膜50が形成されている。中間導電膜50の結晶構造は、基板10の基板面における原子配列と同等の対称性を有する平面を少なくとも1つ有する。中間導電膜50は例えばAuで形成されている。アモルファス層40の上には、アモルファス上導電膜42Aが形成されている。アモルファス上導電膜42Aの上にはアモルファス上導電膜42Bが形成されている。
Claims (10)
- 六方晶で基板面が(0001)面である基板と、
前記基板面の上に形成された複数の導電膜と、を備え、
前記複数の導電膜は、
前記基板の前記基板面に形成された体心立方構造の第1導電膜と、
前記第1導電膜の上方に形成された、前記基板の前記基板面における原子配列と同等の対称性を有する平面を少なくとも1つ有する結晶構造の第2導電膜と、を有し、
前記第2導電膜は、粒径が15μm以下の多結晶であることを特徴とする半導体素子。 - 前記基板は、
単結晶基板と、
前記単結晶基板の上にIII族窒化物半導体で形成された半導体エピタキシャル膜と、を備えたことを特徴とする請求項1に記載の半導体素子。 - 前記基板は、コランダム型構造、又はウルツ型構造であることを特徴とする請求項1又は2に記載の半導体素子。
- 前記基板面はAl2O3の(0001)面、GaNの(0001)面、ZnOの(0001)面、又はSiCの(0001)面であることを特徴とする請求項1乃至3のいずれか1項に記載の半導体素子。
- 前記第2導電膜は、Au、Pt、Cu、Ti、Co、Sr、Y、Zr、Ru、Pd、Ag、Ir、WN、WC、TaN、WSi、又はZnOで形成されたことを特徴とする請求項1乃至4のいずれか1項に記載の半導体素子。
- 前記第1導電膜は、Mo、Nb、W、Ta、V、Cr、又はFeで形成されたことを特徴とする請求項1乃至5のいずれか1項に記載の半導体素子。
- 六方晶で基板面が(0001)面である基板の前記基板面に、プラズマ照射、イオンミリング、又はドライエッチングを施し、前記基板にアモルファス層を形成する工程と、
前記アモルファス層の上方に、アモルファス上導電膜を形成する工程と、を備え、
前記アモルファス上導電膜は、粒径が15μm以下の多結晶であり、
前記アモルファス上導電膜は、前記基板の前記基板面における原子配列と同等の対称性を有する平面を少なくとも1つ有する結晶構造であることを特徴とする半導体素子の製造方法。 - 前記アモルファス上導電膜は、めっき法により形成することを特徴とする請求項7に記載の半導体素子の製造方法。
- 六方晶で基板面が(0001)面である基板の前記基板面に複数の導電膜を形成する工程を備えた半導体素子の製造方法であって、
前記複数の導電膜は、前記基板の前記基板面に形成された体心立方構造の第1導電膜と、
前記第1導電膜の上方に形成された、前記基板の前記基板面における原子配列と同等の対称性を有する平面を少なくとも1つ有する結晶構造の第2導電膜と、を有し、
前記第2導電膜は、粒径が15μm以下の多結晶であるとともに、
前記複数の導電膜のうち、前記第1導電膜の上に形成された導電膜の少なくとも1層はめっき法で形成されたことを特徴とする半導体素子の製造方法。 - 前記基板は、単結晶基板と、前記単結晶基板の上にIII族窒化物半導体で形成された半導体エピタキシャル膜と、を備えたことを特徴とする請求項9に記載の半導体素子の製造方法。
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JP2013091548A JP6111818B2 (ja) | 2013-04-24 | 2013-04-24 | 半導体素子、半導体素子の製造方法 |
TW103102233A TWI528513B (zh) | 2013-04-24 | 2014-01-22 | 半導體裝置、半導體裝置的製造方法 |
US14/162,865 US9018736B2 (en) | 2013-04-24 | 2014-01-24 | Semiconductor device and method of manufacturing semiconductor device |
KR1020140043990A KR101573251B1 (ko) | 2013-04-24 | 2014-04-14 | 반도체 소자, 반도체 소자의 제조방법 |
CN201410164661.8A CN104124220B (zh) | 2013-04-24 | 2014-04-23 | 半导体元件、半导体元件的制造方法 |
DE102014207614.5A DE102014207614B4 (de) | 2013-04-24 | 2014-04-23 | Verfahren zum Herstellen einer Halbleitervorrichtung |
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CN104878347B (zh) * | 2015-06-05 | 2018-06-19 | 深圳市正和忠信股份有限公司 | 一种沉积黑色导电膜层的设备及其使用方法 |
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JPS61156785A (ja) | 1984-12-27 | 1986-07-16 | Fujitsu Ltd | 半導体発光装置 |
JPS61156786A (ja) | 1984-12-27 | 1986-07-16 | Fujitsu Ltd | 半導体発光装置の製造方法 |
JPH08264886A (ja) | 1995-03-27 | 1996-10-11 | Sumitomo Electric Ind Ltd | 半導体レーザ素子およびその製造方法 |
US6388272B1 (en) | 1996-03-07 | 2002-05-14 | Caldus Semiconductor, Inc. | W/WC/TAC ohmic and rectifying contacts on SiC |
JP2967743B2 (ja) * | 1997-01-14 | 1999-10-25 | 日本電気株式会社 | n型窒化ガリウム系半導体のコンタクト電極及びその形成方法 |
JP3299145B2 (ja) * | 1997-07-15 | 2002-07-08 | 日本電気株式会社 | 窒化ガリウム系半導体のp型電極およびその形成方法 |
JP3965610B2 (ja) | 1997-08-01 | 2007-08-29 | 富士通株式会社 | 半導体装置及びその製造方法 |
JP2001015852A (ja) * | 1999-04-26 | 2001-01-19 | Sharp Corp | p型のIII族窒化物半導体層上の電極構造とその形成方法 |
US6894391B1 (en) | 1999-04-26 | 2005-05-17 | Sharp Kabushiki Kaisha | Electrode structure on P-type III group nitride semiconductor layer and formation method thereof |
JP2001122693A (ja) * | 1999-10-22 | 2001-05-08 | Nec Corp | 結晶成長用下地基板およびこれを用いた基板の製造方法 |
AU2002237658A1 (en) * | 2000-11-20 | 2002-05-27 | The Regents Of The University Of California | Process for producing iii-v compound films by chemical deposition |
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