JP6096932B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6096932B2 JP6096932B2 JP2015550627A JP2015550627A JP6096932B2 JP 6096932 B2 JP6096932 B2 JP 6096932B2 JP 2015550627 A JP2015550627 A JP 2015550627A JP 2015550627 A JP2015550627 A JP 2015550627A JP 6096932 B2 JP6096932 B2 JP 6096932B2
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- 239000004065 semiconductor Substances 0.000 title claims description 118
- 230000015556 catabolic process Effects 0.000 claims description 33
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical group [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 12
- 230000005669 field effect Effects 0.000 description 11
- 238000000034 method Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/0281—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements field effect transistors in a "Darlington-like" configuration
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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- H—ELECTRICITY
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
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- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Junction Field-Effect Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
本発明の第1実施形態に係る半導体装置について図1を参照して説明する。
本発明の第2実施形態に係る半導体装置について図2を参照して説明する。なお、図2において図1と同一の部品については同一の符号を付してその説明を省略する。
本発明の第3実施形態に係る半導体装置について図3を参照して説明する。本発明の第3実施形態に係る半導体装置は図1に示す第1実施形態に係る半導体装置1と同一の構成である。なお、図3において図1と同一の部品については同一の符号を付してその説明を省略する。
以上、本発明の実施形態につき説明したが、本発明の範囲はこれに限定されるものではなく、発明の主旨を逸脱しない範囲で種々の変更を加えて実施することができる。
2 第2実施形態に係る半導体装置
3 第3実施形態に係る半導体装置
4 半導体チップ
5〜10 上面視矩形領域
Q1 ノーマリオフ型トランジスタ
Q2、Q3 ノーマリオン型トランジスタ
Q2DG トランジスタQ2の下部ゲート電極
Q2UG トランジスタQ2の上部ゲート電極
Q2DS トランジスタQ2の下部ソース電極
Q2US トランジスタQ2の上部ソース電極
Q2DD トランジスタQ2の下部ドレイン電極
Q2UD トランジスタQ2の上部ドレイン電極
Q3DG トランジスタQ3の下部ゲート電極
Q3UG トランジスタQ3の上部ゲート電極
Q3DS トランジスタQ3の下部ソース電極
Q3US トランジスタQ3の上部ソース電極
Q3DD トランジスタQ3の下部ドレイン電極
Q3UD トランジスタQ3の上部ドレイン電極
R1、R2 抵抗
T1 グランド端子
T2 電源端子
T3 制御端子
D1 ダイオード
Claims (4)
- ノーマリオフ型の第1のトランジスタと、
ノーマリオン型の第2のトランジスタと、
ノーマリオン型の第3のトランジスタと、
ダイオードと、電源端子と、グランド端子と、抵抗とを備え、
前記第1のトランジスタと前記第2のトランジスタとがカスコード接続されており、
前記第3のトランジスタが前記第2のトランジスタに対して並列に接続されており、
前記第2のトランジスタ及び前記第3のトランジスタの各オフ耐圧が前記第1のトランジスタのオフ耐圧より高く、
前記第3のトランジスタのターンオン時間が前記第2のトランジスタのターンオン時間より短く、
前記第1のトランジスタ、前記第2のトランジスタ、及び前記第3のトランジスタそれぞれが第1の電極、第2の電極、及び制御電極を有し、
前記電源端子が前記第2のトランジスタの前記第1の電極及び前記第3のトランジスタの前記第1の電極に接続されており、
前記第2のトランジスタの前記第2の電極及び前記第3のトランジスタの前記第2の電極が前記第1のトランジスタの前記第1の電極に接続されており、
前記第1のトランジスタの前記第2の電極が前記グランド端子に接続されており、
前記電源端子側に前記ダイオードのカソード電極が接続され、前記第3のトランジスタの前記制御電極側に前記ダイオードのアノード電極が接続されるように、前記電源端子と、前記第3のトランジスタの前記制御電極との間に、前記ダイオードが設けられており、
前記ダイオードのアバランシェ電圧は、前記電源端子と前記グランド端子との間の定格電圧より大きく、前記第3のトランジスタのオフ耐圧以下であり、
前記第3のトランジスタの制御電極が前記抵抗を介して前記グランド端子に接続されていることを特徴とする半導体装置。 - 前記第2のトランジスタ及び前記第3のトランジスタが、一つの半導体チップ上に形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記第2のトランジスタ及び前記第3のトランジスタそれぞれがワイドバンドギャップ半導体を用いたトランジスタであることを特徴とする請求項1又は請求項2に記載の半導体装置。
- 前記ワイドバンドギャップ半導体を用いたトランジスタが窒化ガリウム(GaN)系のトランジスタであることを特徴とする請求項3に記載の半導体装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013244133 | 2013-11-26 | ||
JP2013244133 | 2013-11-26 | ||
PCT/JP2014/079310 WO2015079875A1 (ja) | 2013-11-26 | 2014-11-05 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP6096932B2 true JP6096932B2 (ja) | 2017-03-15 |
JPWO2015079875A1 JPWO2015079875A1 (ja) | 2017-03-16 |
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JP2015550627A Active JP6096932B2 (ja) | 2013-11-26 | 2014-11-05 | 半導体装置 |
Country Status (4)
Country | Link |
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US (1) | US20160233209A1 (ja) |
JP (1) | JP6096932B2 (ja) |
CN (1) | CN105684136A (ja) |
WO (1) | WO2015079875A1 (ja) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0410317B2 (ja) * | 1984-01-28 | 1992-02-24 | ||
JPH07263465A (ja) * | 1994-03-24 | 1995-10-13 | Nec Corp | 半導体素子 |
JPH08306924A (ja) * | 1995-05-02 | 1996-11-22 | Motorola Inc | 高電圧保護能力を備えた半導体装置 |
JP2008522436A (ja) * | 2004-12-01 | 2008-06-26 | セミサウス ラボラトリーズ, インコーポレーテッド | ワイドバンドギャップ半導体における常時オフ集積jfet電源スイッチおよび作成方法 |
JP2010530616A (ja) * | 2007-06-13 | 2010-09-09 | ノースロップ グラマン システムズ コーポレーション | 改良された電力用スイッチングトランジスター |
US20120262220A1 (en) * | 2011-04-13 | 2012-10-18 | Semisouth Laboratories, Inc. | Cascode switches including normally-off and normally-on devices and circuits comprising the switches |
JP2012235378A (ja) * | 2011-05-06 | 2012-11-29 | Sharp Corp | 半導体装置および電子機器 |
WO2013080679A1 (ja) * | 2011-12-02 | 2013-06-06 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004266173A (ja) * | 2003-03-04 | 2004-09-24 | Toshiba Corp | 半導体装置 |
US9076853B2 (en) * | 2011-03-18 | 2015-07-07 | International Rectifie Corporation | High voltage rectifier and switching circuits |
KR101922117B1 (ko) * | 2012-08-16 | 2018-11-26 | 삼성전자주식회사 | 트랜지스터를 포함하는 전자소자 및 그 동작방법 |
-
2014
- 2014-11-05 CN CN201480059057.7A patent/CN105684136A/zh active Pending
- 2014-11-05 JP JP2015550627A patent/JP6096932B2/ja active Active
- 2014-11-05 WO PCT/JP2014/079310 patent/WO2015079875A1/ja active Application Filing
- 2014-11-05 US US15/026,546 patent/US20160233209A1/en not_active Abandoned
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0410317B2 (ja) * | 1984-01-28 | 1992-02-24 | ||
JPH07263465A (ja) * | 1994-03-24 | 1995-10-13 | Nec Corp | 半導体素子 |
JPH08306924A (ja) * | 1995-05-02 | 1996-11-22 | Motorola Inc | 高電圧保護能力を備えた半導体装置 |
JP2008522436A (ja) * | 2004-12-01 | 2008-06-26 | セミサウス ラボラトリーズ, インコーポレーテッド | ワイドバンドギャップ半導体における常時オフ集積jfet電源スイッチおよび作成方法 |
JP2010530616A (ja) * | 2007-06-13 | 2010-09-09 | ノースロップ グラマン システムズ コーポレーション | 改良された電力用スイッチングトランジスター |
US20120262220A1 (en) * | 2011-04-13 | 2012-10-18 | Semisouth Laboratories, Inc. | Cascode switches including normally-off and normally-on devices and circuits comprising the switches |
JP2012235378A (ja) * | 2011-05-06 | 2012-11-29 | Sharp Corp | 半導体装置および電子機器 |
WO2013080679A1 (ja) * | 2011-12-02 | 2013-06-06 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
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WO2015079875A1 (ja) | 2015-06-04 |
CN105684136A (zh) | 2016-06-15 |
US20160233209A1 (en) | 2016-08-11 |
JPWO2015079875A1 (ja) | 2017-03-16 |
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Free format text: JAPANESE INTERMEDIATE CODE: R250 |
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R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
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R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |