CN108735730B - 电力开关及其半导体装置 - Google Patents

电力开关及其半导体装置 Download PDF

Info

Publication number
CN108735730B
CN108735730B CN201710659990.3A CN201710659990A CN108735730B CN 108735730 B CN108735730 B CN 108735730B CN 201710659990 A CN201710659990 A CN 201710659990A CN 108735730 B CN108735730 B CN 108735730B
Authority
CN
China
Prior art keywords
transistor cell
voltage
electrode
power switch
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710659990.3A
Other languages
English (en)
Other versions
CN108735730A (zh
Inventor
吴佳龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UPI Semiconductor Corp
Original Assignee
UPI Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by UPI Semiconductor Corp filed Critical UPI Semiconductor Corp
Publication of CN108735730A publication Critical patent/CN108735730A/zh
Application granted granted Critical
Publication of CN108735730B publication Critical patent/CN108735730B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823493MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0018Special modifications or use of the back gate voltage of a FET

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

本发明公开一种电力开关及其半导体装置。电力开关包括第一电晶体晶胞、第二电晶体晶胞、基极区域及导电层。第一电晶体晶胞包括第一电极。第二电晶体晶胞包括第二电极。基极区域位于第一电晶体晶胞与第二电晶体晶胞之间。导电层分别电性连接基极区域、第一电极与第二电极。本发明可减少芯片面积并避免发生高阻抗区域烧毁的情形。

Description

电力开关及其半导体装置
技术领域
本发明与电力开关有关,特别是关于一种电力开关及其半导体装置。
背景技术
图1为现有的N型金氧半场效电晶体(N-MOSFET)电力开关的示意图。由于其基极B接地,会具有较大的导通电阻(Ron)。因此,如图2所示,实务上可将N型金氧半场效电晶体电力开关的基极B耦接至源极S,以降低其导通电阻。
然而,当图2中的N型金氧半场效电晶体电力开关关闭时,其体二极体BD仍会维持单向导通,这将导致电流由其源极S的电压Vout倒灌至汲极D的电压VH。因此,如图3所示,实务上亦可在N型金氧半场效电晶体电力开关的电晶体主体MB之外分别制作基极B与汲极D之间的基体金氧半场效电晶体(Bulk MOSFET)BMOS1以及基极B与源极S之间的基体金氧半场效电晶体BMOS2并进行切换,以防止前述电流倒灌的情形发生。
图4为现有技术中,图3的N型金氧半场效电晶体电力开关电路布局(Layout)的示意图。由于现有的基体金氧半场效电晶体BMOS1与BMOS2位于电晶体主体MB之外,再通过导电层与电晶体主体MB电性连接,这将使得电晶体主体MB内的不同区域(例如第一区域RG1与第二区域RG2)与基体金氧半场效电晶体BMOS1及BMOS2之间的距离不一致,因而产生阻抗不均的现象。举例而言,电晶体主体MB中距离基体金氧半场效电晶体BMOS1及BMOS2较远的区域(例如第二区域RG2)会具有较大的阻抗,使得该区域较为容易烧毁。
发明内容
有鉴于此,本发明提供一种电力开关及其半导体装置,以解决现有技术所述及的问题。
本发明的一较佳具体实施例为一种电力开关。于此实施例中,电力开关包括第一电晶体晶胞、第二电晶体晶胞、基极区域及导电层。第一电晶体晶胞包括第一电极。第二电晶体晶胞包括第二电极。基极区域位于第一电晶体晶胞与第二电晶体晶胞之间。导电层分别电性连接基极区域、第一电极与第二电极。
在本发明的一实施例中,基极区域分别与第一电极及第二电极相邻。
在本发明的一实施例中,第一电极为第一电晶体晶胞的汲极且第二电极为第二电晶体晶胞的源极。
在本发明的一实施例中,第一电晶体晶胞还包括源极与闸极,第一电晶体晶胞的源极耦接第一电压且第一电晶体晶胞的闸极受控于第二电压;第二电晶体晶胞还包括汲极与闸极,第二电晶体晶胞的汲极耦接第二电压且第二电晶体晶胞的闸极受控于第一电压。
在本发明的一实施例中,当电力开关导通时,第一电晶体晶胞导通且第二电晶体晶胞不导通,致使基极区域具有的基极电压维持于第一电压;当电力开关断开时,第二电晶体晶胞导通且第一电晶体晶胞不导通,致使基极电压维持于第二电压。
在本发明的一实施例中,基极区域具有的基极电压选择性地维持于第一电压或第二电压中的较低者。
本发明的另一较佳具体实施例为一种电力开关的半导体装置。于此实施例中,半导体装置包括基板、第一阱区、第二阱区、第一电晶体晶胞、第二电晶体晶胞及金属层。基板具有第一导电性材料。第一阱区设置于基板上,且具有第二导电性材料。第二阱区设置于第一阱区上,且具有第一导电性材料。第一电晶体晶胞位于第二阱区中,且具有第一电极。第二电晶体晶胞位于第二阱区中,且具有第二电极。金属层位于半导体装置的表面,且电性连接第一电极、第二电极及第二阱区。
在本发明的一实施例中,半导体装置还包括第一掺杂区,第一掺杂区具有第一导电性材料并位于第二阱区中,且电性连接金属层。
在本发明的一实施例中,第一掺杂区位于第一电晶体晶胞与第二电晶体晶胞之间。
在本发明的一实施例中,第一掺杂区所具有的第一导电性材料的掺杂浓度高于第二阱区及基板所具有的第一导电性材料的掺杂浓度。
在本发明的一实施例中,半导体装置还包括第二掺杂区,第二掺杂区具有第二导电性材料并位于第二阱区中,且电性连接第一电极或第二电极。
在本发明的一实施例中,第一阱区耦接工作电压。
在本发明的一实施例中,基板耦接接地电压。
相较于现有技术,本发明的电力开关及其半导体装置具有下列优点及功效:
(1)由于本发明的电力开关不需将源极拉到外部与基极连接,故可使元件内部的阻抗变得较为平均,以避免有高阻抗区域烧毁的情形发生。
(2)由于本发明的电力开关将基体金氧半场效电晶体内化于电晶体主体内,使基极与源极在电晶体的主动区中相连,故可省下外部设置基体金氧半场效电晶体的面积,达到减少晶片面积的效果。
关于本发明的优点与精神可以通过以下的发明详述及附图得到进一步的了解。
附图说明
图1至图3分别为现有技术中各种不同的N型金氧半场效电晶体(N-MOSFET)电力开关的示意图。
图4为图3的N型金氧半场效电晶体电力开关的电路布局。
图5为本发明的电力开关的电路布局。
图6为本发明的电力开关中的基体金氧半场效电晶体的等效电路图。
图7为本发明的电力开关的半导体装置的结构剖面图。
主要元件符号说明:
G:闸极
D:汲极
S:源极
B:基极
VH:第一电压
Vout:第二电压
BD、BD1~BD2:体二极体
MB:电晶体主体
BMOS1~BMOS2:基体金氧半场效电晶体
RG1:第一区域
RG2:第二区域
5:电力开关
BR:基极区域
CE1:第一电晶体晶胞
CE2:第二电晶体晶胞
K:基体金氧半场效电晶体
E11~E13、E21~E23:电极
C:导电层
VBY:基极电压
50:半导体装置
SUB:基板
W1:第一阱区
W2:第二阱区
P+:第一掺杂区
N:第二掺杂区
DI1~DI2:二极体
VDD:工作电压
具体实施方式
现在将详细参考本发明的示范性实施例,并在附图中说明所述示范性实施例的实例。另外,在附图及实施方式中所使用相同或类似标号的元件/构件是用来代表相同或类似部分。在下述诸实施例中,当元件被指为「连接」或「耦接」至另一元件时,其可为直接连接或耦接至另一元件,或可能存在介于其间的元件或特定材料(例如:胶体或焊料)。
根据本发明的一较佳具体实施例为一种电力开关。于此实施例中,电力开关可以是N型金氧半场效电晶体(N-MOSFET)电力开关或P型金氧半场效电晶体(P-MOSFET)电力开关,但不以此为限。
请参照图5,图5为本发明的电力开关的电路布局的示意图。
电力开关5包括电晶体主体MB,电晶体主体MB内包括多个电晶体晶胞,第一电晶体晶胞CE1与第二电晶体晶胞CE2彼此相邻。第一电晶体晶胞CE1包括多个电极E11、E12、E13、…;第二电晶体晶胞CE2包括多个电极E21、E22、E23、…。电力开关5还包括基极区域BR及导电层C,基极区域BR位于第一电晶体晶胞CE1与第二电晶体晶胞CE2之间,并分别与第一电晶体晶胞CE1中的电极E11及第二电晶体晶胞CE2中的电极E21相邻;导电层C分别电性连接基极区域BR、第一电晶体晶胞CE1中的电极E11与第二电晶体晶胞CE2中的电极E21,以形成基体金氧半场效电晶体区K。
需说明的是,电极E11为第一电晶体晶胞CE1的多个电极中最靠近基极区域BR的电极,而电极E21为第二电晶体晶胞CE2的多个电极中最靠近基极区域BR的电极;也就是说,导电层C仅会电性连接基极区域BR与第一电晶体晶胞CE1及第二电晶体晶胞CE2中最靠近基极区域BR的电极,并不会电性连接至第一电晶体晶胞CE1及第二电晶体晶胞CE2中的其他电极。
于此实施例中,电极E11为第一电晶体晶胞CE1的汲极(Drain)且电极E21为第二电晶体晶胞CE2的源极(Source),但不以此为限。至于第一电晶体晶胞CE1的电极E12及E13分别为第一电晶体晶胞CE1的闸极(Gate)与源极(Source),第一电晶体晶胞CE1的电极E12(闸极)受控于第二电压Vout且第一电晶体晶胞CE1的电极E13(源极)耦接第一电压VH;第二电晶体晶胞CE2的电极E22及E23分别为第二电晶体晶胞CE1的闸极(Gate)与汲极(Drain),第二电晶体晶胞CE2的电极E22(闸极)受控于第一电压VH且第二电晶体晶胞CE2的电极E23(汲极)耦接第二电压Vout。于实际应用中,第一电压VH可为电力开关5的输入电压且第二电压Vout可为电力开关5的输出电压,但不以此为限。
请参照图6,图6为电力开关中的基体金氧半场效电晶体的等效电路图。如图6所示,基极区域BR位于第一电晶体晶胞CE1与第二电晶体晶胞CE2之间并分别耦接第一电晶体晶胞CE1的汲极D与第二电晶体晶胞CE2的源极S。第一电晶体晶胞CE1的闸极G受控于第二电压Vout且第一电晶体晶胞CE1的源极S耦接第一电压VH。第二电晶体晶胞CE2的闸极G受控于第一电压VH且第二电晶体晶胞CE2的汲极D耦接第二电压Vout。
于此实施例中,基极区域BR具有基极电压VBY且基极电压VBY会选择性地维持于第一电压VH或第二电压Vout中的较低者。举例而言,当电力开关5导通时,第二电压Vout处于高准位(High-level),使得受控于第二电压Vout的第一电晶体晶胞CE1导通,但第二电晶体晶胞CE2不导通,致使基极区域BR具有的基极电压VBY会维持于第一电压VH;当电力开关5断开时,第二电压Vout处于低准位(Low-level),使得受控于第二电压Vout的第一电晶体晶胞CE1不导通,但第二电晶体晶胞CE2导通,致使基极区域BR具有的基极电压VBY会维持于第二电压Vout。
请参照图7,图7为本发明的电力开关的半导体装置的结构剖面图。图7中的虚线区域K框起的部分可对应于图5中的虚线区域K框起的部分,为基体金氧半场效电晶体结构。如图7所示,电力开关的半导体装置50包括基板SUB、第一阱区W1、第二阱区W2、第一掺杂区P+、第一电晶体晶胞CE1、第二电晶体晶胞CE2及金属层C。基板SUB、第二阱区W2及第一掺杂区P+均具有第一导电性材料,且第一掺杂区P+所具有的第一导电性材料的掺杂浓度会高于第二阱区W2及基板SUB所具有的第一导电性材料的掺杂浓度;第一阱区W1具有第二导电性材料。因此,具有第一导电性材料的第二阱区W2与具有第二导电性材料的第一阱区W1之间会形成二极体DI1,且具有第二导电性材料的第一阱区W1与具有第一导电性材料的基板SUB之间会形成二极体DI2。于此实施例中,第一导电性材料为P型导电性材料且第二导电性材料为N型导电性材料,但不以此为限。
第一阱区W1设置于基板SUB上。第二阱区W2设置于第一阱区W1上,用以作为基极区域。第一掺杂区P+、第一电晶体晶胞CE1与第二电晶体晶胞CE2均位于第二阱区W2中,且第一掺杂区P+位于第一电晶体晶胞CE1与第二电晶体晶胞CE2之间。于此实施例中,基板SUB接地且第一阱区W1耦接工作电压VDD,但不以此为限。
第一电晶体晶胞CE1包括多个电极及多个第二掺杂区,该些第二掺杂区N位于第二阱区W2中,且具有第二导电性材料(N型导电性材料);该些电极位于半导体装置50的表面,汲极D与源极S分别电性连接该些第二掺杂区N;源极S耦接第一电压VH且闸极G耦接第二电压Vout。
同理,第二电晶体晶胞CE2亦包括多个电极及多个第二掺杂区,该些第二掺杂区N位于第二阱区W2中,且具有第二导电性材料(N型导电性材料);该些电极位于半导体装置50的表面,汲极D与源极S分别电性连接该些第二掺杂区N;汲极D耦接第二电压Vout且闸极G耦接第一电压VH。
金属层C位于半导体装置50的表面,且位于第一电晶体晶胞CE1与第二电晶体晶胞CE2之间。金属层C分别电性连接第一电晶体晶胞CE1中最靠近金属层C的汲极D、第二电晶体晶胞CE2中最靠近金属层C的源极S、第一掺杂区P+及第二阱区W2。因此,金属层C、第一电晶体晶胞CE1的汲极D、第二电晶体晶胞CE2的源极S、第一掺杂区P+及第二阱区W2具有相同的电位,例如作为基极区域的第二阱区W2的基极电压VBY。
需说明的是,金属层C仅会分别电性连接第一电晶体晶胞CE1中最靠近金属层C的汲极D以及第二电晶体晶胞CE2中最靠近金属层C的源极S,并不会电性连接第一电晶体晶胞CE1与第二电晶体晶胞CE2中的其他电极。
于此实施例中,作为基极区域的第二阱区W2的基极电压VBY会选择性地维持于第一电压VH或第二电压Vout中的较低者。举例而言,当电力开关导通时,第一电晶体晶胞CE1导通且第二电晶体晶胞CE2不导通,致使第二阱区W2的基极电压VBY会维持于第一电压VH;当电力开关断开时,第二电晶体晶胞CE2导通且第一电晶体晶胞CE1不导通,致使第二阱区W2的基极电压VBY会维持于第二电压Vout。
相较于现有技术,本发明的电力开关及其半导体装置具有下列优点及功效:
(1)由于本发明的电力开关不需将源极拉到外部与基极连接,故可使元件内部的阻抗变得较为平均,以避免有高阻抗区域烧毁的情形发生。
(2)由于本发明的电力开关将基体金氧半场效电晶体内化于电晶体主体内,使基极与源极在电晶体的主动区中相连,故可省下外部设置基体金氧半场效电晶体的面积,达到减少晶片面积的效果。
通过以上较佳具体实施例的详述,是希望能更加清楚描述本发明的特征与精神,而并非以上述所公开的较佳具体实施例来对本发明的范畴加以限制。相反地,其目的是希望能涵盖各种改变及具相等性的安排于本发明权利要求的范畴内。

Claims (11)

1.一种电力开关,其特征在于,包括:
一第一电晶体晶胞,包括一第一电极;
一第二电晶体晶胞,包括一第二电极;
一基极区域,位于该第一电晶体晶胞与该第二电晶体晶胞之间;以及
一导电层,分别电性连接该基极区域、该第一电极与该第二电极,
其中,该基极区域具有的一基极电压选择性地维持于一第一电压或一第二电压中的较低者,该第一电极为该第一电晶体晶胞的汲极且该第二电极为该第二电晶体晶胞的源极,该第一电压为该电力开关的输入电压且该第二电压为该电力开关的输出电压。
2.如权利要求1所述的电力开关,其特征在于,该基极区域分别与该第一电极及该第二电极相邻。
3.如权利要求1所述的电力开关,其特征在于,该第一电晶体晶胞还包括源极与闸极,该第一电晶体晶胞的该源极耦接该第一电压且该第一电晶体晶胞的该闸极受控于该第二电压;该第二电晶体晶胞还包括汲极与闸极,该第二电晶体晶胞的该汲极耦接该第二电压且该第二电晶体晶胞的该闸极受控于该第一电压。
4.如权利要求1所述的电力开关,其特征在于,当该电力开关导通时,该第一电晶体晶胞导通且该第二电晶体晶胞不导通,致使该基极区域具有的一基极电压维持于该第一电压;当该电力开关断开时,该第二电晶体晶胞导通且该第一电晶体晶胞不导通,致使该基极电压维持于该第二电压。
5.一种电力开关的半导体装置,其特征在于,包括:
一基板,具有一第一导电性材料;
一第一阱区,设置于该基板上,且具有一第二导电性材料;
一第二阱区,设置于该第一阱区上,且具有该第一导电性材料;
一第一电晶体晶胞,位于该第二阱区中,且具有一第一电极;
一第二电晶体晶胞,位于该第二阱区中,且具有一第二电极;
一基极区域,位于该第一电晶体晶胞与该第二电晶体晶胞之间;以及
一金属层,位于该半导体装置的一表面,且分别电性连接该第一电极、该第二电极及该第二阱区,
其中,该基极区域具有的一基极电压选择性地维持于一第一电压或一第二电压中的较低者,该第一电极为该第一电晶体晶胞的汲极且该第二电极为该第二电晶体晶胞的源极,该第一电压为该电力开关的输入电压且该第二电压为该电力开关的输出电压。
6.如权利要求5所述的半导体装置,其特征在于,还包括:
一第一掺杂区,具有该第一导电性材料并位于该第二阱区中,且电性连接该金属层。
7.如权利要求6所述的半导体装置,其特征在于,该第一掺杂区位于该第一电晶体晶胞与该第二电晶体晶胞之间。
8.如权利要求6所述的半导体装置,其特征在于,该第一掺杂区所具有的该第一导电性材料的掺杂浓度高于该第二阱区及该基板所具有的该第一导电性材料的掺杂浓度。
9.如权利要求5所述的半导体装置,其特征在于,还包括:
一第二掺杂区,具有该第二导电性材料并位于该第二阱区中,且电性连接该第一电极或该第二电极。
10.如权利要求5所述的半导体装置,其特征在于,该第一阱区耦接一工作电压。
11.如权利要求5所述的半导体装置,其特征在于,该基板耦接一接地电压。
CN201710659990.3A 2017-04-18 2017-08-04 电力开关及其半导体装置 Active CN108735730B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW106112984A TWI697097B (zh) 2017-04-18 2017-04-18 電力開關及其半導體裝置
TW106112984 2017-04-18

Publications (2)

Publication Number Publication Date
CN108735730A CN108735730A (zh) 2018-11-02
CN108735730B true CN108735730B (zh) 2021-09-28

Family

ID=63790363

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710659990.3A Active CN108735730B (zh) 2017-04-18 2017-08-04 电力开关及其半导体装置

Country Status (3)

Country Link
US (1) US10461741B2 (zh)
CN (1) CN108735730B (zh)
TW (1) TWI697097B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102618601B1 (ko) * 2018-11-29 2023-12-27 엘지디스플레이 주식회사 픽셀 센싱 장치와 그를 포함한 유기발광 표시장치, 및 유기발광 표시장치의 픽셀 센싱 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103503138A (zh) * 2011-01-07 2014-01-08 英飞凌科技奥地利有限公司 具有第一半导体器件并具有多个第二半导体器件的半导体器件装置

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5635821A (en) * 1995-06-30 1997-06-03 National Semiconductor Corporation Low cell charge enable circuit
US5929615A (en) * 1998-09-22 1999-07-27 Impala Linear Corporation Step-up/step-down voltage regulator using an MOS synchronous rectifier
JP3444263B2 (ja) * 2000-03-30 2003-09-08 株式会社日立製作所 制御回路内蔵絶縁ゲート半導体装置
US7345342B2 (en) * 2001-01-30 2008-03-18 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US7638841B2 (en) * 2003-05-20 2009-12-29 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US7060566B2 (en) * 2004-06-22 2006-06-13 Infineon Technologies Ag Standby current reduction over a process window with a trimmable well bias
TWM289882U (en) * 2005-10-13 2006-04-21 Wistron Corp Circuit board to reduce EMI, and its application on power converter and notebook computer
JP5105462B2 (ja) * 2005-12-27 2012-12-26 ルネサスエレクトロニクス株式会社 半導体集積回路
US7994761B2 (en) * 2007-10-08 2011-08-09 Astec International Limited Linear regulator with RF transistors and a bias adjustment circuit
US8455948B2 (en) * 2011-01-07 2013-06-04 Infineon Technologies Austria Ag Transistor arrangement with a first transistor and with a plurality of second transistors
US8354684B2 (en) * 2011-01-09 2013-01-15 Bridgelux, Inc. Packaging photon building blocks having only top side connections in an interconnect structure
US8847631B2 (en) * 2011-12-23 2014-09-30 General Electric Company High speed low loss gate drive circuit
TWI623143B (zh) * 2012-07-07 2018-05-01 西凱渥資訊處理科技公司 與基於射頻開關之絕緣體上矽相關之電路、裝置、方法及其組合
WO2014047823A1 (en) * 2012-09-27 2014-04-03 Qualcomm Incorporated Power switch cell with adaptive body bias
EP2720362A1 (en) * 2012-10-12 2014-04-16 ST-Ericsson SA Independent output control for single-inductor, bipolar outputs, buck-boost converters
US9007117B2 (en) * 2013-08-02 2015-04-14 Infineon Technologies Dresden Gmbh Solid-state switching device having a high-voltage switching transistor and a low-voltage driver transistor
US9543379B2 (en) * 2014-03-18 2017-01-10 Nxp Usa, Inc. Semiconductor device with peripheral breakdown protection
CN104467364B (zh) * 2014-12-15 2017-03-01 矽力杰半导体技术(杭州)有限公司 一种过零检测电路及开关电源
CN106300929B (zh) * 2015-05-21 2019-03-15 台达电子工业股份有限公司 开关电路
US20160351699A1 (en) * 2015-05-26 2016-12-01 Nxp B.V. Field-effect transistors with body dropdowns
DE102016207859B3 (de) * 2016-05-06 2017-10-26 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Monolithisch integrierter Halbleiterschalter, insbesondere Leistungstrennschalter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103503138A (zh) * 2011-01-07 2014-01-08 英飞凌科技奥地利有限公司 具有第一半导体器件并具有多个第二半导体器件的半导体器件装置

Also Published As

Publication number Publication date
US10461741B2 (en) 2019-10-29
CN108735730A (zh) 2018-11-02
US20180302084A1 (en) 2018-10-18
TWI697097B (zh) 2020-06-21
TW201839955A (zh) 2018-11-01

Similar Documents

Publication Publication Date Title
TWI446520B (zh) 用於配置超低電壓瞬態電壓抑制器的底部源極n型金屬氧化物半導體觸發的齊納箝位
US9263443B2 (en) Semiconductor device including a normally-off transistor and transistor cells of a normally-on GaN HEMT
KR100642651B1 (ko) 정전기 방전용 실리콘 제어 정류기
JP6201422B2 (ja) 半導体装置
EP1087441A2 (en) Stacked mosfet protection circuit
US8964342B2 (en) Compound semiconductor ESD protection devices
CN102612753A (zh) 双向开关
JP2012517699A (ja) Iii族窒化物デバイスおよび回路
TW201508894A (zh) 緊密靜電放電保護結構
KR101742447B1 (ko) 반도체 장치
US20080230834A1 (en) Semiconductor apparatus having lateral type MIS transistor
US10256228B2 (en) Semiconductor device
JPWO2014103126A1 (ja) サージ保護素子及び半導体装置
JP4593126B2 (ja) 半導体装置
TWI524496B (zh) 化合物半導體靜電保護元件
US10811531B2 (en) Transistor device with gate resistor
CN108735730B (zh) 电力开关及其半导体装置
JP2018524813A (ja) マルチ電極制御を備える高電圧デバイス
CN106663658B (zh) 半导体集成电路
CN100505260C (zh) 保护元件及使用保护元件的半导体装置
CN110085583B (zh) 半导体器件和操作方法
JP2006093684A (ja) 半導体装置及びそれを用いた光半導体リレー装置
CN107293537B (zh) 静电放电保护装置、存储器元件及静电放电保护方法
JP2016174240A (ja) 半導体スイッチ
JP2010278110A (ja) 半導体装置及び高周波スイッチ回路

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant