JP6091206B2 - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

Info

Publication number
JP6091206B2
JP6091206B2 JP2012279843A JP2012279843A JP6091206B2 JP 6091206 B2 JP6091206 B2 JP 6091206B2 JP 2012279843 A JP2012279843 A JP 2012279843A JP 2012279843 A JP2012279843 A JP 2012279843A JP 6091206 B2 JP6091206 B2 JP 6091206B2
Authority
JP
Japan
Prior art keywords
insulating film
film
region
main surface
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2012279843A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014123671A5 (enExample
JP2014123671A (ja
Inventor
船矢　琢央
琢央 船矢
宏美 鴫原
宏美 鴫原
久雄 鴫原
久雄 鴫原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2012279843A priority Critical patent/JP6091206B2/ja
Priority to US14/106,569 priority patent/US8987861B2/en
Priority to CN201310712188.8A priority patent/CN103887287B/zh
Publication of JP2014123671A publication Critical patent/JP2014123671A/ja
Priority to HK14111822.5A priority patent/HK1198303A1/xx
Priority to US14/625,390 priority patent/US9219108B2/en
Publication of JP2014123671A5 publication Critical patent/JP2014123671A5/ja
Priority to US14/961,622 priority patent/US9818815B2/en
Application granted granted Critical
Publication of JP6091206B2 publication Critical patent/JP6091206B2/ja
Priority to US15/799,772 priority patent/US10157974B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/20—Inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/06102—Disposition the bonding areas being at different heights
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4945—Wire connectors having connecting portions of different types on the semiconductor or solid-state body, e.g. regular and reverse stitches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Coils Or Transformers For Communication (AREA)
JP2012279843A 2012-12-21 2012-12-21 半導体装置および半導体装置の製造方法 Active JP6091206B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2012279843A JP6091206B2 (ja) 2012-12-21 2012-12-21 半導体装置および半導体装置の製造方法
US14/106,569 US8987861B2 (en) 2012-12-21 2013-12-13 Semiconductor device and method of manufacturing the same
CN201310712188.8A CN103887287B (zh) 2012-12-21 2013-12-20 半导体装置和半导体装置的制造方法
HK14111822.5A HK1198303A1 (en) 2012-12-21 2014-11-21 Semiconductor device and method of manufacturing the same
US14/625,390 US9219108B2 (en) 2012-12-21 2015-02-18 Semiconductor device and method of manufacturing the same
US14/961,622 US9818815B2 (en) 2012-12-21 2015-12-07 Semiconductor device and method of manufacturing the same
US15/799,772 US10157974B2 (en) 2012-12-21 2017-10-31 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012279843A JP6091206B2 (ja) 2012-12-21 2012-12-21 半導体装置および半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2017020522A Division JP6360926B2 (ja) 2017-02-07 2017-02-07 半導体装置

Publications (3)

Publication Number Publication Date
JP2014123671A JP2014123671A (ja) 2014-07-03
JP2014123671A5 JP2014123671A5 (enExample) 2015-09-03
JP6091206B2 true JP6091206B2 (ja) 2017-03-08

Family

ID=50956112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012279843A Active JP6091206B2 (ja) 2012-12-21 2012-12-21 半導体装置および半導体装置の製造方法

Country Status (4)

Country Link
US (4) US8987861B2 (enExample)
JP (1) JP6091206B2 (enExample)
CN (1) CN103887287B (enExample)
HK (1) HK1198303A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11605868B2 (en) 2021-03-19 2023-03-14 Kabushiki Kaisha Toshiba Isolator

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8994494B2 (en) 2008-10-10 2015-03-31 Polaris Industries Inc. Vehicle security system
US9162558B2 (en) 2009-06-15 2015-10-20 Polaris Industries Inc. Electric vehicle
US8517136B2 (en) 2010-04-06 2013-08-27 Polaris Industries Inc. Vehicle
WO2012138991A2 (en) 2011-04-08 2012-10-11 Polaris Industries Inc. Electric vehicle with range extender
CN102832189B (zh) * 2012-09-11 2014-07-16 矽力杰半导体技术(杭州)有限公司 一种多芯片封装结构及其封装方法
US9929038B2 (en) 2013-03-07 2018-03-27 Analog Devices Global Insulating structure, a method of forming an insulating structure, and a chip scale isolator including such an insulating structure
KR20150135255A (ko) 2013-03-25 2015-12-02 르네사스 일렉트로닉스 가부시키가이샤 반도체 장치 및 그 제조 방법
JP6395304B2 (ja) 2013-11-13 2018-09-26 ローム株式会社 半導体装置および半導体モジュール
CN104810244B (zh) * 2014-01-26 2018-12-18 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法、半导体器件和电子装置
JP6402978B2 (ja) * 2014-07-25 2018-10-10 セイコーエプソン株式会社 半導体回路素子、電子機器、および移動体
US10236265B2 (en) * 2014-07-28 2019-03-19 Infineon Technologies Ag Semiconductor chip and method for forming a chip pad
JP6434763B2 (ja) * 2014-09-29 2018-12-05 ルネサスエレクトロニクス株式会社 半導体装置
DE102014117510A1 (de) 2014-11-28 2016-06-02 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement
CN105789108B (zh) * 2014-12-16 2019-02-12 中芯国际集成电路制造(上海)有限公司 功率晶体管芯片的制作方法及功率晶体管芯片
JP6589277B2 (ja) * 2015-01-14 2019-10-16 富士電機株式会社 高耐圧受動素子および高耐圧受動素子の製造方法
JP6724308B2 (ja) * 2015-08-07 2020-07-15 セイコーエプソン株式会社 発振モジュール、振動デバイス、電子機器、および移動体
JP2017045864A (ja) * 2015-08-26 2017-03-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
EP3358603A4 (en) * 2015-10-01 2019-06-12 Renesas Electronics Corporation Semiconductor device and method for manufacturing same
US10204732B2 (en) 2015-10-23 2019-02-12 Analog Devices Global Dielectric stack, an isolator device and method of forming an isolator device
US9941565B2 (en) 2015-10-23 2018-04-10 Analog Devices Global Isolator and method of forming an isolator
JP2017098334A (ja) * 2015-11-19 2017-06-01 ルネサスエレクトロニクス株式会社 半導体装置
JP2018182223A (ja) * 2017-04-20 2018-11-15 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP6819564B2 (ja) * 2017-12-19 2021-01-27 三菱電機株式会社 半導体装置およびその製造方法
DE102019122844B4 (de) 2018-08-29 2024-07-25 Analog Devices International Unlimited Company Back-to-Back-Isolationsschaltung
CN109326571B (zh) * 2018-09-26 2020-12-29 矽力杰半导体技术(杭州)有限公司 芯片封装组件及其制造方法
JP2020088200A (ja) * 2018-11-27 2020-06-04 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US11450469B2 (en) 2019-08-28 2022-09-20 Analog Devices Global Unlimited Company Insulation jacket for top coil of an isolated transformer
US11716117B2 (en) * 2020-02-14 2023-08-01 Texas Instruments Incorporated Circuit support structure with integrated isolation circuitry
JP7332775B2 (ja) * 2020-03-19 2023-08-23 株式会社東芝 アイソレータ
JP7284121B2 (ja) * 2020-03-23 2023-05-30 株式会社東芝 アイソレータ
JP2021174955A (ja) * 2020-04-30 2021-11-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
WO2022065007A1 (ja) * 2020-09-23 2022-03-31 ローム株式会社 半導体装置、半導体モジュール、モータ駆動装置および車両
JP7535953B2 (ja) * 2021-01-13 2024-08-19 三菱電機株式会社 トランス装置および半導体装置
CN113035507B (zh) * 2021-04-22 2025-09-30 全球能源互联网研究院有限公司 一种用于直流gis的电压互感器
US11887948B2 (en) * 2021-08-02 2024-01-30 Stmicroelectronics S.R.L. Integrated circuit chip including a passivation nitride layer in contact with a high voltage bonding pad and method of making
CN115831916B (zh) * 2021-09-17 2024-03-15 上海玻芯成微电子科技有限公司 一种隔离器及芯片
JP7615073B2 (ja) * 2022-02-25 2025-01-16 三菱電機株式会社 トランス素子、半導体装置、トランス素子の製造方法、および半導体装置の製造方法
CN119856277A (zh) * 2022-09-30 2025-04-18 德州仪器公司 具有剪切焊盘的微装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0413212A (ja) * 1990-05-07 1992-01-17 Mitsubishi Electric Corp 薄膜磁気ヘッド
JPH0629662A (ja) * 1992-07-10 1994-02-04 Toray Ind Inc 多層配線構成体およびポリイミド系絶縁膜のパターン加工方法
JPH10255239A (ja) * 1997-03-06 1998-09-25 Read Rite S M I Kk インダクティブ／ｍｒ複合型薄膜磁気ヘッド
JP3420703B2 (ja) * 1998-07-16 2003-06-30 株式会社東芝 半導体装置の製造方法
JP3408172B2 (ja) * 1998-12-10 2003-05-19 三洋電機株式会社 チップサイズパッケージ及びその製造方法
US6483662B1 (en) * 1999-07-09 2002-11-19 Read-Rite Corporation High density multi-coil magnetic write head having a reduced yoke length and short flux rise time
JP2005150329A (ja) * 2003-11-14 2005-06-09 Canon Inc 配線構造及びその作製方法
TWI330863B (en) * 2005-05-18 2010-09-21 Megica Corp Semiconductor chip with coil element over passivation layer
JP2009212332A (ja) * 2008-03-05 2009-09-17 Nec Electronics Corp 半導体装置及びその製造方法
JP2009267215A (ja) * 2008-04-28 2009-11-12 Fuji Electric Device Technology Co Ltd 半導体装置の製造方法
JP2009302268A (ja) * 2008-06-13 2009-12-24 Toyota Central R&D Labs Inc トランス素子が形成されている半導体装置とその製造方法
JP2009302418A (ja) 2008-06-17 2009-12-24 Nec Electronics Corp 回路装置及びその製造方法
KR101548777B1 (ko) * 2011-12-19 2015-09-01 삼성전기주식회사 노이즈 제거 필터
KR20150135255A (ko) * 2013-03-25 2015-12-02 르네사스 일렉트로닉스 가부시키가이샤 반도체 장치 및 그 제조 방법
KR102173470B1 (ko) * 2014-01-29 2020-11-03 르네사스 일렉트로닉스 가부시키가이샤 반도체 장치

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11605868B2 (en) 2021-03-19 2023-03-14 Kabushiki Kaisha Toshiba Isolator

Also Published As

Publication number Publication date
US8987861B2 (en) 2015-03-24
HK1198303A1 (en) 2015-03-27
US9219108B2 (en) 2015-12-22
US20140175602A1 (en) 2014-06-26
US20180069073A1 (en) 2018-03-08
US20160087025A1 (en) 2016-03-24
US9818815B2 (en) 2017-11-14
JP2014123671A (ja) 2014-07-03
CN103887287A (zh) 2014-06-25
US10157974B2 (en) 2018-12-18
US20150162395A1 (en) 2015-06-11
CN103887287B (zh) 2019-04-09

Similar Documents

Publication Publication Date Title
JP6091206B2 (ja) 半導体装置および半導体装置の製造方法
JP6235353B2 (ja) 半導体装置の製造方法
TWI578493B (zh) 半導體裝置及其製造方法
JP6249960B2 (ja) 半導体装置
JP2018139290A (ja) 半導体装置
JP6360926B2 (ja) 半導体装置
JP2018186280A (ja) 半導体装置
JP6435037B2 (ja) 半導体装置
JP2017034265A (ja) 半導体装置
HK1214408B (en) Semiconductor device and method for manufacturing same

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150721

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150721

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20160714

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160719

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160916

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20170110

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20170207

R150 Certificate of patent or registration of utility model

Ref document number: 6091206

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250