JP6008054B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6008054B2 JP6008054B2 JP2015541483A JP2015541483A JP6008054B2 JP 6008054 B2 JP6008054 B2 JP 6008054B2 JP 2015541483 A JP2015541483 A JP 2015541483A JP 2015541483 A JP2015541483 A JP 2015541483A JP 6008054 B2 JP6008054 B2 JP 6008054B2
- Authority
- JP
- Japan
- Prior art keywords
- potential
- region
- semiconductor region
- diffusion region
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 151
- 238000002955 isolation Methods 0.000 claims description 106
- 239000010410 layer Substances 0.000 claims description 55
- 239000002344 surface layer Substances 0.000 claims description 15
- 239000012212 insulator Substances 0.000 claims description 10
- 230000005669 field effect Effects 0.000 claims description 5
- 238000000926 separation method Methods 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 description 295
- 239000000758 substrate Substances 0.000 description 42
- 230000015556 catabolic process Effects 0.000 description 37
- 230000003071 parasitic effect Effects 0.000 description 24
- 238000000034 method Methods 0.000 description 14
- 238000006243 chemical reaction Methods 0.000 description 12
- 239000012535 impurity Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000000295 complement effect Effects 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 238000010992 reflux Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/0285—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements bias arrangements for gate electrode of field effect transistors, e.g. RC networks, voltage partitioning circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
実施の形態1にかかる半導体装置の構造について、電力変換用ブリッジ回路を駆動する高耐圧ICを例に説明する。図1は、実施の形態1にかかる高耐圧ICの等価回路を示す回路図である。図1に示すように、電力変換用ブリッジ回路(外部回路)を構成する第1,2MOSFET101,102(第1,2絶縁ゲート型トランジスタ)は、高圧の主電源(正極側)Vdcと、この主電源の負極側であるグランド電位GNDとの間に直列に接続されている。VS端子は、第1MOSFET101と第2MOSFET102との接続点105に接続される。接続点105は、電力変換用ブリッジ回路の出力点であり、例えば負荷であるモータなどが接続される。電力変換用ブリッジ回路には、第1,2MOSFET101,102に代えて第1,2IGBTを配置してもよい。
次に、実施の形態2にかかる半導体装置について説明する。図4は、実施の形態2にかかる高耐圧ICの平面構造を模式的に示す平面図である。実施の形態2にかかる半導体装置は、ハイサイド領域10内の第1,2n拡散領域およびp分離拡散領域の平面レイアウトが実施の形態1にかかる半導体装置と異なる。具体的には、実施の形態2にかかる半導体装置が実施の形態1にかかる半導体装置と異なる点は、ハイサイド領域10を構成するn拡散領域のうち、VS端子に接続されたp拡散領域54を設けた部分の周囲を囲むようにp分離拡散領域55を配置した点である。
次に、実施の形態3にかかる半導体装置について説明する。図5は、実施の形態3にかかる高耐圧ICの平面構造を模式的に示す平面図である。実施の形態3にかかる半導体装置は、ハイサイド領域10内の第1,2n拡散領域およびp分離拡散領域の平面レイアウトが実施の形態1にかかる半導体装置と異なる。具体的には、実施の形態3にかかる半導体装置が実施の形態1にかかる半導体装置と異なる点は、ハイサイド領域10を構成するn拡散領域のうち、VB端子に接続された部分の周囲を囲むようにp分離拡散領域65を配置した点である。
次に、実施の形態4にかかる半導体装置について説明する。図6は、実施の形態4にかかる高耐圧ICの断面構造を模式的に示す断面図である。図6には、図2の切断線A−A’における断面構造を示す。実施の形態4にかかる半導体装置が実施の形態1にかかる半導体装置と異なる点は、トレンチ内に埋め込んだ絶縁体層(分離領域)75によって第1n拡散領域72と第2n拡散領域73とを分離(DTI:Deep Trench Isolation)した点である。すなわち、p分離拡散領域に代えて、絶縁体層75が設けられている。
2,52,62,72 第1n拡散領域
2a,3a n+高濃度領域
2b,3b,4b,8b コンタクト電極
3,53,63,73 第2n拡散領域
4,54,64,74 p拡散領域
4a p+高濃度領域
5,55,65 p分離拡散領域
6−1,6−2,7 n-低濃度拡散領域
8 p-低濃度拡散領域
10 ハイサイド領域
11 高耐圧分離領域
12 ローサイド領域
20 PMOS
21 p+ソース領域
22 p+ドレイン領域
23,43 ゲート絶縁膜
24,44 ゲート電極
25,45 ソース電極
26,46 ドレイン電極
30 基準電位またはフローティング電位の端子
40 NMOS
41 n+ソース領域
42 n+ドレイン領域
75 絶縁体層
100 高耐圧IC
101 第1MOSFET
102 第2MOSFET
103,104 FWD
105 第1MOSFETと第2MOSFETとの接続点
110 ハイサイド駆動回路
111 ゲート駆動回路
112 レベルシフト抵抗
113 PMOSとNMOSとの接続点
114 レベルシフタ
115 制御回路
GND グランド電位
VB 電源電位
VS 基準電位
Claims (9)
- 第1導電型の半導体層の表面層に選択的に設けられた、第1電位と接続される第2導電型の第1半導体領域と、
前記半導体層の表面層に選択的に設けられた、前記第1電位よりも低い第2電位と接続されるまたはフローティング電位となる第2導電型の第2半導体領域と、
前記第2半導体領域の内部に選択的に設けられた、前記第2電位と接続される第1導電型の第3半導体領域と、
前記第1半導体領域および前記第3半導体領域に設けられ、前記第2電位を基準電位とし、当該基準電位と前記第1電位との間の電位で動作する回路と、
前記第1半導体領域と前記第2半導体領域との間に設けられ、前記第1半導体領域と前記第2半導体領域とを電気的に分離する分離領域と、
を備え、
前記回路は、高電位側の第1絶縁ゲート型トランジスタと低電位側の第2絶縁ゲート型 トランジスタとが接続されてなる外部回路の前記第1絶縁ゲート型トランジスタを駆動す るゲート駆動回路であることを特徴とする半導体装置。 - 前記半導体層は、前記第1電位よりも低い第3電位と接続され、
前記分離領域は、前記第1半導体領域および前記第2半導体領域に接し、かつ前記半導体層に電気的に接続された第1導電型半導体領域であることを特徴とする請求項1に記載の半導体装置。 - 前記分離領域は、
前記第1半導体領域と前記第2半導体領域との間において、前記第1半導体領域および前記第2半導体領域を深さ方向に貫通して前記半導体層に達するトレンチと、
前記トレンチの内部に埋め込まれた絶縁体層と、からなることを特徴とする請求項1に記載の半導体装置。 - 前記第2電位は、前記第1絶縁ゲート型トランジスタと前記第2絶縁ゲート型トランジスタとの接続点の電位であることを特徴とする請求項1〜3のいずれか一つに記載の半導体装置。
- 前記第2電位が前記第3電位より所定電位高いときに前記第1導電型半導体領域と前記第1半導体領域および前記第2半導体領域との間のpn接合から広がる空乏層同士がつながることを特徴とする請求項2に記載の半導体装置。
- 前記第1半導体領域内に形成された第1導電型チャネルの絶縁ゲート型電界効果トランジスタと、前記第3半導体領域内に形成された第2導電型チャネルの絶縁ゲート型電界効果トランジスタとによりCMOS回路を構成することを特徴とする請求項1〜5のいずれか一つに記載の半導体装置。
- 前記第2半導体領域の平面レイアウトは、前記第1半導体領域の周囲を囲むように設け られたことを特徴とする請求項1〜6のいずれか一つに記載の半導体装置。
- 前記第1半導体領域の平面レイアウトは、前記第2半導体領域の周囲を囲むように設け られたことを特徴とする請求項1〜6のいずれか一つに記載の半導体装置。
- 第1導電型の半導体層の表面層に選択的に設けられた、第1電位と接続される第2導電型の第1半導体領域と、
前記半導体層の表面層に選択的に前記第1半導体領域と離して設けられた、前記第1電位よりも低い第2電位と接続されるまたはフローティング電位となる第2導電型の第2半導体領域と、
前記第2半導体領域の内部に選択的に設けられた、前記第2電位と接続される第1導電型の第3半導体領域と、
前記第1半導体領域および前記第3半導体領域に設けられ、前記第2電位を基準電位とし、当該基準電位と前記第1電位との間の電位で動作する回路と、
前記第1半導体領域および前記第2半導体領域に接し、かつ前記半導体層に電気的に接続された第1導電型半導体領域と、
を備え、
前記半導体層は、前記第1電位よりも低い第3電位と接続され、
前記第2電位が前記第3電位より所定電位高いときに、前記第1導電型半導体領域と前記第1半導体領域および前記第2半導体領域との間のpn接合から広がる空乏層同士がつながることを特徴とする半導体装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013210548 | 2013-10-07 | ||
JP2013210548 | 2013-10-07 | ||
PCT/JP2014/073578 WO2015053022A1 (ja) | 2013-10-07 | 2014-09-05 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP6008054B2 true JP6008054B2 (ja) | 2016-10-19 |
JPWO2015053022A1 JPWO2015053022A1 (ja) | 2017-03-09 |
Family
ID=52812842
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015541483A Active JP6008054B2 (ja) | 2013-10-07 | 2014-09-05 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9412732B2 (ja) |
JP (1) | JP6008054B2 (ja) |
CN (1) | CN105122452B (ja) |
WO (1) | WO2015053022A1 (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6656968B2 (ja) * | 2016-03-18 | 2020-03-04 | エイブリック株式会社 | Esd保護素子を有する半導体装置 |
JP6686721B2 (ja) * | 2016-06-15 | 2020-04-22 | 富士電機株式会社 | 半導体集積回路装置 |
JP6733425B2 (ja) * | 2016-08-29 | 2020-07-29 | 富士電機株式会社 | 半導体集積回路及び半導体モジュール |
KR20180064583A (ko) * | 2016-12-05 | 2018-06-15 | 삼성디스플레이 주식회사 | 칩 온 필름 패키지 및 이를 포함하는 표시 장치 |
JP6653769B2 (ja) * | 2016-12-14 | 2020-02-26 | 日立オートモティブシステムズ株式会社 | 負荷駆動装置 |
TWI629785B (zh) * | 2016-12-29 | 2018-07-11 | 新唐科技股份有限公司 | 高電壓積體電路的高電壓終端結構 |
TWI609487B (zh) * | 2016-12-30 | 2017-12-21 | 新唐科技股份有限公司 | 半導體裝置 |
CN108321116A (zh) | 2017-01-17 | 2018-07-24 | 联华电子股份有限公司 | 具有半导体元件的集成电路结构及其制造方法 |
TWI608592B (zh) * | 2017-01-25 | 2017-12-11 | 新唐科技股份有限公司 | 半導體裝置 |
KR20200100967A (ko) * | 2019-02-19 | 2020-08-27 | 주식회사 엘지화학 | Ic 칩 및 이를 이용한 회로 시스템 |
JP7210490B2 (ja) * | 2020-01-17 | 2023-01-23 | 三菱電機株式会社 | 半導体装置 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0637281A (ja) * | 1992-07-17 | 1994-02-10 | Matsushita Electric Ind Co Ltd | 半導体記憶装置およびその製造方法 |
JPH1126598A (ja) * | 1997-07-02 | 1999-01-29 | Tadahiro Omi | 半導体集積回路 |
JP2003258120A (ja) * | 2002-03-07 | 2003-09-12 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2004031411A (ja) * | 2002-06-21 | 2004-01-29 | Renesas Technology Corp | 半導体装置 |
JP2004296831A (ja) * | 2003-03-27 | 2004-10-21 | Mitsubishi Electric Corp | 半導体装置 |
JP2006005184A (ja) * | 2004-06-18 | 2006-01-05 | Toshiba Corp | 半導体集積回路 |
JP2007123706A (ja) * | 2005-10-31 | 2007-05-17 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
JP2009206119A (ja) * | 2008-02-26 | 2009-09-10 | Seiko Epson Corp | Dc−dcコンバータ |
JP2011035374A (ja) * | 2009-07-06 | 2011-02-17 | Rohm Co Ltd | 保護回路 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3917211B2 (ja) | 1996-04-15 | 2007-05-23 | 三菱電機株式会社 | 半導体装置 |
US6127857A (en) * | 1997-07-02 | 2000-10-03 | Canon Kabushiki Kaisha | Output buffer or voltage hold for analog of multilevel processing |
CN101944529B (zh) * | 2009-07-06 | 2016-02-03 | 罗姆股份有限公司 | 保护电路 |
US8674729B2 (en) | 2009-09-29 | 2014-03-18 | Fuji Electric Co., Ltd. | High voltage semiconductor device and driving circuit |
US20120068761A1 (en) * | 2010-09-17 | 2012-03-22 | Power Integrations, Inc. | Method and apparatus for protection of an anti-fuse element in a high-voltage integrated circuit |
-
2014
- 2014-09-05 CN CN201480021149.6A patent/CN105122452B/zh not_active Expired - Fee Related
- 2014-09-05 WO PCT/JP2014/073578 patent/WO2015053022A1/ja active Application Filing
- 2014-09-05 JP JP2015541483A patent/JP6008054B2/ja active Active
-
2015
- 2015-10-13 US US14/882,451 patent/US9412732B2/en active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0637281A (ja) * | 1992-07-17 | 1994-02-10 | Matsushita Electric Ind Co Ltd | 半導体記憶装置およびその製造方法 |
JPH1126598A (ja) * | 1997-07-02 | 1999-01-29 | Tadahiro Omi | 半導体集積回路 |
JP2003258120A (ja) * | 2002-03-07 | 2003-09-12 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2004031411A (ja) * | 2002-06-21 | 2004-01-29 | Renesas Technology Corp | 半導体装置 |
JP2004296831A (ja) * | 2003-03-27 | 2004-10-21 | Mitsubishi Electric Corp | 半導体装置 |
JP2006005184A (ja) * | 2004-06-18 | 2006-01-05 | Toshiba Corp | 半導体集積回路 |
JP2007123706A (ja) * | 2005-10-31 | 2007-05-17 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
JP2009206119A (ja) * | 2008-02-26 | 2009-09-10 | Seiko Epson Corp | Dc−dcコンバータ |
JP2011035374A (ja) * | 2009-07-06 | 2011-02-17 | Rohm Co Ltd | 保護回路 |
Also Published As
Publication number | Publication date |
---|---|
JPWO2015053022A1 (ja) | 2017-03-09 |
WO2015053022A1 (ja) | 2015-04-16 |
US9412732B2 (en) | 2016-08-09 |
US20160043067A1 (en) | 2016-02-11 |
CN105122452A (zh) | 2015-12-02 |
CN105122452B (zh) | 2017-10-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6008054B2 (ja) | 半導体装置 | |
JP5991435B2 (ja) | 半導体装置 | |
US9478543B2 (en) | Semiconductor integrated circuit | |
JP5754558B2 (ja) | 半導体集積回路装置 | |
WO2014058028A1 (ja) | 半導体装置 | |
JP6237901B2 (ja) | 半導体集積回路装置 | |
JP6277785B2 (ja) | 半導体装置 | |
JP2014138091A (ja) | 半導体装置およびその製造方法 | |
JP6579273B2 (ja) | 半導体集積回路 | |
JP6226101B2 (ja) | 半導体集積回路 | |
JP6034268B2 (ja) | 半導体装置 | |
US10217765B2 (en) | Semiconductor integrated circuit | |
JP6413467B2 (ja) | 半導体装置 | |
JP6677672B2 (ja) | 半導体装置 | |
JP5505499B2 (ja) | 半導体装置および駆動回路 | |
JP4945948B2 (ja) | 半導体装置 | |
JP2010010264A (ja) | 半導体装置 | |
JP2010232673A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151013 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20151013 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160510 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160711 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160816 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160829 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6008054 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |