JP5994274B2 - 半導体装置、半導体装置の製造方法、及び、電子機器 - Google Patents

半導体装置、半導体装置の製造方法、及び、電子機器 Download PDF

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JP5994274B2
JP5994274B2 JP2012029429A JP2012029429A JP5994274B2 JP 5994274 B2 JP5994274 B2 JP 5994274B2 JP 2012029429 A JP2012029429 A JP 2012029429A JP 2012029429 A JP2012029429 A JP 2012029429A JP 5994274 B2 JP5994274 B2 JP 5994274B2
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Prior art keywords
semiconductor substrate
interlayer insulating
insulating layer
bonding
metal film
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JP2012029429A
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Japanese (ja)
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JP2013168419A5 (enExample
JP2013168419A (ja
Inventor
賢哉 萩本
賢哉 萩本
宣年 藤井
藤井　　宣年
青柳　健一
健一 青柳
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Sony Corp
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Sony Corp
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Priority to JP2012029429A priority Critical patent/JP5994274B2/ja
Priority to US13/755,881 priority patent/US9147650B2/en
Priority to CN201310049242.5A priority patent/CN103247603B/zh
Publication of JP2013168419A publication Critical patent/JP2013168419A/ja
Publication of JP2013168419A5 publication Critical patent/JP2013168419A5/ja
Priority to US14/827,883 priority patent/US9716076B2/en
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Publication of JP5994274B2 publication Critical patent/JP5994274B2/ja
Priority to US15/634,693 priority patent/US10485293B2/en
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US14/827,883 US9716076B2 (en) 2012-02-14 2015-08-17 Method for manufacturing semiconductor device with metal-containing film layer at bonding surface thereof
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Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5994274B2 (ja) * 2012-02-14 2016-09-21 ソニー株式会社 半導体装置、半導体装置の製造方法、及び、電子機器
US8735219B2 (en) * 2012-08-30 2014-05-27 Ziptronix, Inc. Heterogeneous annealing method and device
JP6335099B2 (ja) * 2014-11-04 2018-05-30 東芝メモリ株式会社 半導体装置および半導体装置の製造方法
JP6313189B2 (ja) * 2014-11-04 2018-04-18 東芝メモリ株式会社 半導体装置の製造方法
JP6465665B2 (ja) * 2015-01-22 2019-02-06 日本放送協会 固体撮像素子およびその製造方法
KR102492854B1 (ko) * 2015-03-03 2023-01-31 소니그룹주식회사 반도체 장치 및 전자 기기
JP2016174016A (ja) * 2015-03-16 2016-09-29 株式会社東芝 半導体装置および半導体装置の製造方法
JP2016181531A (ja) * 2015-03-23 2016-10-13 ソニー株式会社 半導体装置、および半導体装置の製造方法、固体撮像素子、撮像装置、並びに電子機器
JP2016219660A (ja) 2015-05-22 2016-12-22 ソニー株式会社 半導体装置、製造方法、固体撮像素子、および電子機器
US10204893B2 (en) 2016-05-19 2019-02-12 Invensas Bonding Technologies, Inc. Stacked dies and methods for forming bonded structures
KR102505856B1 (ko) 2016-06-09 2023-03-03 삼성전자 주식회사 웨이퍼 대 웨이퍼 접합 구조체
JP6856983B2 (ja) * 2016-06-30 2021-04-14 キヤノン株式会社 光電変換装置及びカメラ
US9666573B1 (en) 2016-10-26 2017-05-30 Micron Technology, Inc. Methods of forming integrated circuitry
TWI892323B (zh) * 2016-10-27 2025-08-01 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
US10879212B2 (en) 2017-05-11 2020-12-29 Invensas Bonding Technologies, Inc. Processed stacked dies
US10103053B1 (en) 2017-07-14 2018-10-16 Micron Technology, Inc. Methods of forming integrated circuitry
JP2019054153A (ja) * 2017-09-15 2019-04-04 東芝メモリ株式会社 半導体装置の製造方法
US11031285B2 (en) 2017-10-06 2021-06-08 Invensas Bonding Technologies, Inc. Diffusion barrier collar for interconnects
US10818624B2 (en) * 2017-10-24 2020-10-27 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method for manufacturing the same
DE102018124337A1 (de) 2017-11-21 2019-05-23 Taiwan Semiconductor Manufacturing Co. Ltd. Ankerstrukturen und verfahren zur gleichmässigen waferplanarisierung und -bondung
US11152417B2 (en) 2017-11-21 2021-10-19 Taiwan Semiconductor Manufacturing Co., Ltd. Anchor structures and methods for uniform wafer planarization and bonding
JP2019140178A (ja) * 2018-02-07 2019-08-22 東芝メモリ株式会社 半導体装置
US11244916B2 (en) * 2018-04-11 2022-02-08 Invensas Bonding Technologies, Inc. Low temperature bonded structures
US11276676B2 (en) 2018-05-15 2022-03-15 Invensas Bonding Technologies, Inc. Stacked devices and methods of fabrication
TWI888349B (zh) * 2018-06-05 2025-07-01 日商索尼半導體解決方案公司 固體攝像裝置、固體攝像裝置之製造方法及電子機器
WO2020010265A1 (en) 2018-07-06 2020-01-09 Invensas Bonding Technologies, Inc. Microelectronic assemblies
WO2020010136A1 (en) 2018-07-06 2020-01-09 Invensas Bonding Technologies, Inc. Molded direct bonded and interconnected stack
US11011494B2 (en) * 2018-08-31 2021-05-18 Invensas Bonding Technologies, Inc. Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics
JP6903612B2 (ja) * 2018-09-06 2021-07-14 株式会社東芝 半導体装置
US11742374B2 (en) 2018-10-05 2023-08-29 Sony Semiconductor Solutions Corporation Semiconductor device, method of manufacturing semiconductor device, and imaging element
US11094573B2 (en) * 2018-11-21 2021-08-17 Applied Materials, Inc. Method and apparatus for thin wafer carrier
WO2020150159A1 (en) 2019-01-14 2020-07-23 Invensas Bonding Technologies, Inc. Bonded structures
US11031374B2 (en) * 2019-03-06 2021-06-08 Micron Technology, Inc. Methods of compensating for misalignment of bonded semiconductor wafers
US11296053B2 (en) 2019-06-26 2022-04-05 Invensas Bonding Technologies, Inc. Direct bonded stack structures for increased reliability and improved yield in microelectronics
US12080672B2 (en) * 2019-09-26 2024-09-03 Adeia Semiconductor Bonding Technologies Inc. Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive
US11404307B2 (en) * 2019-09-27 2022-08-02 Intel Corporation Interconnect structures and methods of fabrication
KR102558820B1 (ko) 2020-02-17 2023-07-21 양쯔 메모리 테크놀로지스 씨오., 엘티디. 하이브리드 웨이퍼 본딩 방법 및 그에 따른 구조체
CN111463114B (zh) * 2020-04-17 2021-08-06 武汉新芯集成电路制造有限公司 半导体器件及其形成方法、芯片
US11631647B2 (en) 2020-06-30 2023-04-18 Adeia Semiconductor Bonding Technologies Inc. Integrated device packages with integrated device die and dummy element
JP7652560B2 (ja) * 2020-12-16 2025-03-27 キオクシア株式会社 半導体記憶装置、半導体装置およびその製造方法
WO2022147459A1 (en) 2020-12-30 2022-07-07 Invensas Bonding Technologies, Inc. Structure with conductive feature and method of forming same
US11927814B2 (en) 2022-01-05 2024-03-12 Scidatek Inc. Semiconductor photodetector array sensor integrated with optical-waveguide-based devices
JP2023137581A (ja) * 2022-03-18 2023-09-29 キオクシア株式会社 半導体装置、半導体装置の製造方法
US20240071746A1 (en) * 2022-08-26 2024-02-29 Tokyo Electron Limited Plasma surface treatment for wafer bonding methods
US20240387426A1 (en) * 2023-05-18 2024-11-21 International Business Machines Corporation Electromigration resistant semiconductor structure

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01205465A (ja) 1988-02-10 1989-08-17 Sony Corp 固体撮像装置及びその製造方法
US7800199B2 (en) * 2003-06-24 2010-09-21 Oh Choonsik Semiconductor circuit
US6596640B1 (en) * 2002-06-21 2003-07-22 Intel Corporation Method of forming a raised contact for a substrate
US7727892B2 (en) * 2002-09-25 2010-06-01 Intel Corporation Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects
US7186637B2 (en) * 2003-07-31 2007-03-06 Intel Corporation Method of bonding semiconductor devices
KR100610481B1 (ko) 2004-12-30 2006-08-08 매그나칩 반도체 유한회사 수광영역을 넓힌 이미지센서 및 그 제조 방법
US7354862B2 (en) * 2005-04-18 2008-04-08 Intel Corporation Thin passivation layer on 3D devices
JP2007103546A (ja) * 2005-10-03 2007-04-19 Nec Electronics Corp 半導体装置およびその製造方法
JP2008258311A (ja) * 2007-04-03 2008-10-23 Denso Corp 半導体装置及び半導体装置の配線または電極形成方法
JP4835710B2 (ja) * 2009-03-17 2011-12-14 ソニー株式会社 固体撮像装置、固体撮像装置の製造方法、固体撮像装置の駆動方法、及び電子機器
JP5407660B2 (ja) * 2009-08-26 2014-02-05 ソニー株式会社 半導体装置の製造方法
JP5451547B2 (ja) * 2010-07-09 2014-03-26 キヤノン株式会社 固体撮像装置
JP5183708B2 (ja) * 2010-09-21 2013-04-17 株式会社日立製作所 半導体装置およびその製造方法
JP2012204501A (ja) * 2011-03-24 2012-10-22 Sony Corp 半導体装置、電子デバイス、及び、半導体装置の製造方法
US8431436B1 (en) * 2011-11-03 2013-04-30 International Business Machines Corporation Three-dimensional (3D) integrated circuit with enhanced copper-to-copper bonding
JP5994274B2 (ja) * 2012-02-14 2016-09-21 ソニー株式会社 半導体装置、半導体装置の製造方法、及び、電子機器
US9142517B2 (en) * 2012-06-05 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid bonding mechanisms for semiconductor wafers

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