JP5940500B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5940500B2 JP5940500B2 JP2013188156A JP2013188156A JP5940500B2 JP 5940500 B2 JP5940500 B2 JP 5940500B2 JP 2013188156 A JP2013188156 A JP 2013188156A JP 2013188156 A JP2013188156 A JP 2013188156A JP 5940500 B2 JP5940500 B2 JP 5940500B2
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- 239000004065 semiconductor Substances 0.000 title claims description 352
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000012535 impurity Substances 0.000 claims description 70
- 239000000758 substrate Substances 0.000 claims description 28
- 238000000034 method Methods 0.000 claims description 9
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 238000005468 ion implantation Methods 0.000 description 19
- 230000005684 electric field Effects 0.000 description 16
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 12
- 229910010271 silicon carbide Inorganic materials 0.000 description 12
- 230000015556 catabolic process Effects 0.000 description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 230000006378 damage Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910021334 nickel silicide Inorganic materials 0.000 description 1
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 238000005092 sublimation method Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Description
前記第1半導体領域は、第1導電形を有する。
前記第1電極は、前記第1半導体領域の上に設けられる。
前記第2半導体領域は第2導電形を有し、前記第1半導体領域と前記第1電極との間に設けられる。
前記第3半導体領域は第2導電形を有し、前記第1半導体領域と前記第1電極との間に設けられる。前記第3半導体領域は、第1部分と、第1部分よりも深さの深い第2部分と、を有する。第3半導体領域の第1半導体領域側には、第1部分と第2部分とにより凹凸形状が構成される。
前記第4半導体領域は第1導電形を有し、前記第1半導体領域と前記第3半導体領域との間に設けられ、前記第1半導体領域の不純物の濃度よりも高い不純物の濃度を有する。
前記第2電極は前記第1半導体領域の前記第1電極とは反対側に設けられる。
図1は、第1の実施形態に係る半導体装置の構成を例示する模式的断面図である。
図2は、第1の実施形態に係る半導体装置の構成を例示する模式的平面図である。
図1には、図2に示すA−A線の模式的断面図が表される。図2において、アノード電極(第1電極)81の下側にある構成は、破線で示される。
図1に表したように、本実施形態に係る半導体装置110は、n−−形半導体領域(第1半導体領域)11と、アノード電極(第1電極)81と、第1p形半導体領域(第2半導体領域)20と、第2p形半導体領域(第3半導体領域)30と、カソード電極(第2電極)82と、を備える。半導体装置110は、JBSダイオード及びアバランシェダイオードを含む。半導体装置110は、n−形半導体領域(第4半導体領域)40、p+形半導体領域(第5半導体領域)50及びp−形半導体領域(第6半導体領域)60の少なくともいずれかをさらに備えていてもよい。
半導体装置110のカソード電極82に対してアノード電極81が正になるよう(順方向)電圧を印加すると、アノード電極81からショットキー障壁を越えた電子がn−−形半導体領域11及び基板10を介してカソード電極82に流れる。さらに、所定の電圧(例えば、3V)を超えると、第2p形半導体領域30とn−−形半導体領域11との界面に存在するpn接合面を介してビルトインポテンシャルを超えた電子及びホールが流れる。
図3の横軸はX方向の位置を表し、縦軸はZ方向の位置を表している。図3には、第2p形半導体領域30の第1部分301での電界強度分布が表される。電界強度分布は、電界強度E1〜E7のそれぞれの等電界線によって表される。電界強度の値は、電界強度E1〜E7の順に小さくなる。
図4(a)〜図6(b)は、半導体装置の製造方法を例示する模式的断面図である。
先ず、図4(a)に表したように、基板10の第1面10a上に、n−−形半導体領域11を形成する。基板10には、例えば、SiCのバルク基板が用いられる。基板10には、n形の不純物(例えば、窒素(N))がドーピングされている。基板10の不純物の濃度は、例えば1×1018cm−3以上5×1018cm−3以下程度である。
次に、第2の実施形態について説明する。
図7は、第2の実施形態に係る半導体装置の構成を例示する模式的断面図である。
図7には、第2の実施形態に係る半導体装置120が表される。
図2に表した例では、第2p形半導体領域30は、Z方向にみて、複数の第1p形半導体領域20の周りを囲むように設けられている。すなわち、図2に表した例では、JBSダイオードの領域の周りを囲むようにアバランシェダイオードの領域が設けられる。半導体装置のレイアウトは、これ以外であってもよい。
図8(a)及び図8(b)には、JBSダイオードとアバランシェダイオードとのZ方向にみたレイアウトの例が表される。説明の便宜上、図8(a)及び図8(b)では、矩形の基板10におけるJBSダイオードの領域をS1、アバランシェダイオードの領域をS2として模式的に表している。なお、領域S1及びS2を総称して領域Sと言うことにする。JBSダイオードの領域S1には、図中破線で示される第1p形半導体領域20が含まれる。アバランシェダイオードの領域S2には、図中破線で示される第2p形半導体領域30の第1部分301及び第2部分302が含まれる。
Claims (14)
- 第1導電形の第1半導体領域と、
前記第1半導体領域の上に設けられた第1電極と、
前記第1半導体領域と前記第1電極との間に設けられた第2導電形の第2半導体領域と、
前記第1半導体領域と前記第1電極との間に設けられ前記第2半導体領域の不純物濃度と実質的に等しい不純物濃度を有し、第1部分と、前記第1部分よりも深さの深い第2部分と、により前記第1半導体領域側に凹凸形状が構成された第3半導体領域と、
前記第1半導体領域と前記第3半導体領域との間に設けられ前記第1半導体領域の不純物の濃度よりも高い不純物の濃度を有する第1導電形の第4半導体領域と、
前記第1半導体領域の前記第1電極とは反対側に設けられた第2電極と、
を備えた半導体装置。 - 前記第4半導体領域は、SiCを含む請求項1記載の半導体装置。
- 前記第3半導体領域と前記第1電極との間に設けられ前記第3半導体領域の不純物の濃度よりも高い不純物の濃度を有する第2導電形の第5半導体領域をさらに備えた請求項1または2に記載の半導体装置。
- 前記第5半導体領域と前記第1電極との間に設けられ、前記第1電極の比抵抗よりも低い比抵抗を有する第3電極をさらに備えた請求項3記載の半導体装置。
- 前記第1電極はTiを含み、
前記第3電極はNiを含む請求項4記載の半導体装置。 - 前記第5半導体領域は、SiCを含む請求項3〜5のいずれか1つに記載の半導体装置。
- 前記第1半導体領域と前記第1電極とを結ぶ方向にみて、前記第1電極の外周端は前記第5半導体領域の端部と前記第3半導体領域の端部との間に設けられた請求項3〜6のいずれか1つに記載の半導体装置。
- 前記第3半導体領域と隣接して設けられ前記第3半導体領域の不純物の濃度よりも低い不純物の濃度を有する第2導電形の第6半導体領域をさらに備えた請求項1〜7のいずれか1つに記載の半導体装置。
- 前記第6半導体領域は、SiCを含む請求項8記載の半導体装置。
- 前記第1半導体領域、前記第2半導体領域、前記第3半導体領域は、SiCを含む請求項1〜9のいずれか1つに記載の半導体装置。
- 前記第2半導体領域の不純物濃度は、5×1017cm−3以上1×1019cm−3以下であり、
前記第3半導体領域の不純物濃度は、5×1017cm−3以上1×1019cm−3以下である請求項1〜10のいずれか1つに記載の半導体装置。 - 基板の第1面上に第1導電形の第1半導体領域を形成する工程と、
前記第1半導体領域に第2導電形の不純物を注入して第2導電形の第2半導体領域と、第2導電形の第3半導体領域の第1部分と、を形成する工程と、
前記第1半導体領域に第2導電形の不純物を注入して前記第3半導体領域のうち前記第1部分よりも深さの深い第2部分を形成することにより、前記第3半導体領域の前記第1半導体領域側に凹凸形状を設ける工程と、
前記第1半導体領域に第1導電形の不純物を注入して前記第3半導体領域と接し前記第1半導体領域の不純物の濃度よりも高い不純物の濃度を有する第1導電形の第4半導体領域を形成する工程と、
前記第1半導体領域、前記第2半導体領域及び前記第3半導体領域と接する第1電極を形成する工程と、
前記基板の前記第1面とは反対側の第2面に接する第2電極を形成する工程と、
を備えた半導体装置の製造方法。 - 前記凹凸形状を設ける工程と、前記第1電極を形成する工程と、の間に、前記第3半導体領域に第2導電形の不純物を注入して前記第3半導体領域の不純物の濃度よりも高い不純物の濃度を有する第2導電形の第5半導体領域を形成する工程をさらに備えた請求項12記載の半導体装置の製造方法。
- 前記第1半導体領域を形成する工程と、前記第2半導体領域を形成する工程と、の間に、前記第1半導体領域に第2導電形の不純物を注入して第2導電形の第6半導体領域を形成する工程をさらに備えた請求項12または13に記載の半導体装置の製造方法。
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