JP5801996B2 - 両面冷却式電力用被覆層付き電力モジュール - Google Patents
両面冷却式電力用被覆層付き電力モジュール Download PDFInfo
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- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Description
少なくとも1個の半導体電力用素子と、
少なくとも1個の半導体電力用素子に接合された電力用被覆層(POL)と、
少なくとも1個の半導体電力用素子のPOLと反対の側で少なくとも1個の半導体電力用素子に接合された第一のヒート・シンクと、
POLの少なくとも1個の半導体に接合された側の反対側で軟質の放熱界面材料(TIM:Thermal Interface Material)のみを介してPOLに接合された第二のヒート・シンクと
を備えており、少なくとも1個の半導体電力用素子、POL、第一のヒート・シンク及び第二のヒート・シンクは、まとめて両面冷却式電力用被覆層モジュールを形成している。
少なくとも1個の半導体電力用素子と、
少なくとも1個の半導体電力用素子に接合された電力用被覆層と、
少なくとも1個の半導体電力用素子に接合された第一の基材アセンブリであって、
第一の平坦な表面及び第一の平坦な表面に実質的に平行な第二の平坦な表面を含んでいるセラミック層と、
第一の平坦な表面に接合された金属層と、
第二の平坦な表面に接合された流路層と、
第二の平坦な表面の反対側の流路層の表面に接合された多岐管層と
を含んでおり、当該第一の基材アセンブリの各層がまとめて単体の基材として構成されている、第一の基材アセンブリと、
軟質の放熱界面材料(TIM)のみを介して電力用被覆層に接合された第二の基材アセンブリであって、
第三の平坦な表面及び実質的に第三の平坦な表面に実質的に平行な第四の平坦な表面を含んでいるセラミック層と、
第三の平坦な表面に接合された金属層と、
第四の平坦な表面に接合された流路層と、
第四の平坦な表面の反対側の流路層の表面に接合された多岐管層と
を含んでおり、当該第二の基材アセンブリの各層がまとめて単体の基材として構成されている、第二の基材アセンブリと
を備えている。
12 電力用チップ
14 上面側熱交換器
16 底面側熱交換器
20 流路型両面冷却式電力モジュール
22 半導体電力用チップ
24 電力用被覆層(POL)
26 軟質の放熱界面材料(TIM)
27 金属層
28、30 流路型ヒート・シンク・アセンブリ
32 基材
34 最上金属層
36 はんだ接合部
38 基材
40 流路層
42 多岐管層
43 筐体入口
44、45 筐体
46 流路
48 筐体出口
50 流路型両面冷却式電力モジュール
Claims (1)
- 少なくとも1個の半導体電力用素子(22)と、
該少なくとも1個の半導体電力用素子(22)に接合された電力用被覆層(POL)(24)と、
前記少なくとも1個の半導体電力用素子(22)の前記POL(24)と反対の側で前記少なくとも1個の半導体電力用素子(22)に接合された第一のヒート・シンク(30)と、
前記POL(24)の前記少なくとも1個の半導体電力用素子(22)に接合された側の反対側で軟質の放熱界面材料(TIM)(26)のみを介して前記POL(24)に接合された第二のヒート・シンク(28)と
を備えた電力モジュール(20)であって、前記少なくとも1個の半導体電力用素子(22)、POL(24)、第一のヒート・シンク(30)及び第二のヒート・シンク(28)は、まとめて両面冷却式電力用被覆層モジュール(20)を形成しており、
前記第2のヒート・シンク(28)が、その表面に金属層(27)が形成された絶縁性のセラミック層(32)を含み、
前記軟質の放熱界面材料(TIM)(26)は、前記少なくとも1個の半導体電力用素子(22)の通常の動作温度において液体の金属であり、冶金的接合手法(はんだ付け及びろう付けを含む)を用いることなく前記第二のヒート・シンク(28)の前記絶縁性のセラミック層(32)の前記金属層(27)及び前記POL(24)の表面同士の間に密な接触を形成する、電力モジュール(20)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US12/404,272 | 2009-03-13 | ||
US12/404,272 US8358000B2 (en) | 2009-03-13 | 2009-03-13 | Double side cooled power module with power overlay |
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JP2015138365A Division JP2015173301A (ja) | 2009-03-13 | 2015-07-10 | 両面冷却式電力用被覆層付き電力モジュール |
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JP2010219529A JP2010219529A (ja) | 2010-09-30 |
JP5801996B2 true JP5801996B2 (ja) | 2015-10-28 |
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JP2010053928A Active JP5801996B2 (ja) | 2009-03-13 | 2010-03-11 | 両面冷却式電力用被覆層付き電力モジュール |
JP2015138365A Pending JP2015173301A (ja) | 2009-03-13 | 2015-07-10 | 両面冷却式電力用被覆層付き電力モジュール |
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US (1) | US8358000B2 (ja) |
EP (1) | EP2228820A3 (ja) |
JP (2) | JP5801996B2 (ja) |
CN (1) | CN101840914B (ja) |
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-
2009
- 2009-03-13 US US12/404,272 patent/US8358000B2/en active Active
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2010
- 2010-03-04 EP EP10155503.5A patent/EP2228820A3/en not_active Ceased
- 2010-03-11 JP JP2010053928A patent/JP5801996B2/ja active Active
- 2010-03-12 CN CN201010146956.4A patent/CN101840914B/zh active Active
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JP2010219529A (ja) | 2010-09-30 |
JP2015173301A (ja) | 2015-10-01 |
US8358000B2 (en) | 2013-01-22 |
CN101840914A (zh) | 2010-09-22 |
US20100230800A1 (en) | 2010-09-16 |
CN101840914B (zh) | 2015-08-05 |
EP2228820A2 (en) | 2010-09-15 |
EP2228820A3 (en) | 2016-01-20 |
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