JP5757163B2 - 多層配線基板およびその製造方法、並びに半導体装置 - Google Patents
多層配線基板およびその製造方法、並びに半導体装置 Download PDFInfo
- Publication number
- JP5757163B2 JP5757163B2 JP2011124604A JP2011124604A JP5757163B2 JP 5757163 B2 JP5757163 B2 JP 5757163B2 JP 2011124604 A JP2011124604 A JP 2011124604A JP 2011124604 A JP2011124604 A JP 2011124604A JP 5757163 B2 JP5757163 B2 JP 5757163B2
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- JP
- Japan
- Prior art keywords
- layer
- dielectric layer
- forming
- conductive layer
- metal foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/33—Thin- or thick-film capacitors (thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
- H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
- H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011124604A JP5757163B2 (ja) | 2011-06-02 | 2011-06-02 | 多層配線基板およびその製造方法、並びに半導体装置 |
| US13/480,925 US9672983B2 (en) | 2011-06-02 | 2012-05-25 | Peel resistant multilayer wiring board with thin film capacitor and manufacturing method thereof |
| CN201210167121.6A CN102821545B (zh) | 2011-06-02 | 2012-05-25 | 多层布线板、其制造方法以及半导体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011124604A JP5757163B2 (ja) | 2011-06-02 | 2011-06-02 | 多層配線基板およびその製造方法、並びに半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012253195A JP2012253195A (ja) | 2012-12-20 |
| JP2012253195A5 JP2012253195A5 (enExample) | 2014-07-10 |
| JP5757163B2 true JP5757163B2 (ja) | 2015-07-29 |
Family
ID=47261548
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011124604A Expired - Fee Related JP5757163B2 (ja) | 2011-06-02 | 2011-06-02 | 多層配線基板およびその製造方法、並びに半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9672983B2 (enExample) |
| JP (1) | JP5757163B2 (enExample) |
| CN (1) | CN102821545B (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012182437A (ja) * | 2011-02-09 | 2012-09-20 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
| KR20190058695A (ko) * | 2014-02-21 | 2019-05-29 | 미쓰이금속광업주식회사 | 내장 캐패시터층 형성용 동장 적층판, 다층 프린트 배선판 및 다층 프린트 배선판의 제조 방법 |
| KR20160004090A (ko) * | 2014-07-02 | 2016-01-12 | 삼성전기주식회사 | 박막 인덕터용 코일 유닛, 박막 인덕터용 코일 유닛의 제조방법, 박막 인덕터 및 박막 인덕터의 제조방법 |
| JP2016219737A (ja) * | 2015-05-26 | 2016-12-22 | ソニー株式会社 | 電子機器 |
| CN106658964A (zh) * | 2015-10-28 | 2017-05-10 | 碁鼎科技秦皇岛有限公司 | 电路板及其制作方法 |
| WO2017183135A1 (ja) | 2016-04-20 | 2017-10-26 | 富士通株式会社 | 回路基板、回路基板の製造方法及び電子装置 |
| WO2017183146A1 (ja) * | 2016-04-21 | 2017-10-26 | 富士通株式会社 | 回路基板、回路基板の製造方法及び電子装置 |
| KR101813374B1 (ko) * | 2016-05-13 | 2017-12-28 | 삼성전기주식회사 | 박막 커패시터 및 그 제조방법 |
| CN107613642B (zh) * | 2017-08-31 | 2019-06-07 | 江苏普诺威电子股份有限公司 | 含阶梯槽埋容线路板的制作方法 |
| JP7063019B2 (ja) * | 2018-03-09 | 2022-05-09 | Tdk株式会社 | 薄膜コンデンサの製造方法及び薄膜コンデンサ |
| JP6932289B2 (ja) * | 2019-04-02 | 2021-09-08 | 三菱電機株式会社 | 複合プリント配線板およびその製造方法 |
| CN114650662B (zh) * | 2020-12-21 | 2025-10-10 | 中兴通讯股份有限公司 | 一种印制电路板及其制造方法 |
| US20250174404A1 (en) * | 2023-11-29 | 2025-05-29 | KYOCERA AVX Components Corporation | Multilayer Electronic Component Including at Least One Via Connected to a Capacitor Outside Its Capacitive Area |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2002333131A1 (en) * | 2001-10-23 | 2003-05-06 | David W. Schindel | Ultrasonic printed circuit board transducer |
| ES2305428T3 (es) * | 2003-07-21 | 2008-11-01 | Abb Research Ltd. | Electroceramica metalizada irradiada por laser. |
| US7056800B2 (en) * | 2003-12-15 | 2006-06-06 | Motorola, Inc. | Printed circuit embedded capacitors |
| KR100619367B1 (ko) * | 2004-08-26 | 2006-09-08 | 삼성전기주식회사 | 고유전율을 갖는 커패시터를 내장한 인쇄회로기판 및 그제조 방법 |
| JP4028863B2 (ja) * | 2004-09-10 | 2007-12-26 | 富士通株式会社 | 基板製造方法 |
| JP3816508B2 (ja) | 2004-11-04 | 2006-08-30 | 三井金属鉱業株式会社 | キャパシタ層形成材及びそのキャパシタ層形成材を用いて得られる内蔵キャパシタ層を備えたプリント配線板 |
| KR100867038B1 (ko) * | 2005-03-02 | 2008-11-04 | 삼성전기주식회사 | 커패시터 내장형 인쇄회로기판 및 그 제조방법 |
| JP4674606B2 (ja) * | 2005-10-18 | 2011-04-20 | 株式会社村田製作所 | 薄膜キャパシタ |
| JP4461386B2 (ja) * | 2005-10-31 | 2010-05-12 | Tdk株式会社 | 薄膜デバイスおよびその製造方法 |
| KR100793916B1 (ko) * | 2006-04-05 | 2008-01-15 | 삼성전기주식회사 | 인쇄회로기판 내장형 커패시터의 제조방법 |
| KR100878414B1 (ko) * | 2006-10-27 | 2009-01-13 | 삼성전기주식회사 | 캐패시터 내장형 인쇄회로기판 및 제조방법 |
| KR100881695B1 (ko) * | 2007-08-17 | 2009-02-06 | 삼성전기주식회사 | 캐패시터 내장형 인쇄회로기판 및 그 제조 방법 |
| EP2136610A4 (en) * | 2008-01-25 | 2011-07-13 | Ibiden Co Ltd | MULTILAYER CONDUCTOR PLATE AND METHOD FOR THE PRODUCTION THEREOF |
| JP5659592B2 (ja) * | 2009-11-13 | 2015-01-28 | ソニー株式会社 | 印刷回路基板の製造方法 |
-
2011
- 2011-06-02 JP JP2011124604A patent/JP5757163B2/ja not_active Expired - Fee Related
-
2012
- 2012-05-25 CN CN201210167121.6A patent/CN102821545B/zh not_active Expired - Fee Related
- 2012-05-25 US US13/480,925 patent/US9672983B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2012253195A (ja) | 2012-12-20 |
| CN102821545A (zh) | 2012-12-12 |
| CN102821545B (zh) | 2018-02-02 |
| US9672983B2 (en) | 2017-06-06 |
| US20120307469A1 (en) | 2012-12-06 |
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