JP5716026B2 - 基板のパターニング方法及びそのシステム - Google Patents

基板のパターニング方法及びそのシステム Download PDF

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Publication number
JP5716026B2
JP5716026B2 JP2012525726A JP2012525726A JP5716026B2 JP 5716026 B2 JP5716026 B2 JP 5716026B2 JP 2012525726 A JP2012525726 A JP 2012525726A JP 2012525726 A JP2012525726 A JP 2012525726A JP 5716026 B2 JP5716026 B2 JP 5716026B2
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substrate
resist
particles
layer
array
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JP2013502726A5 (enExample
JP2013502726A (ja
Inventor
エム マーティン パトリック
エム マーティン パトリック
ディー カールソン スティーブン
ディー カールソン スティーブン
オー ダニエル
オー ダニエル
パク ジュン−ウック
パク ジュン−ウック
Original Assignee
ヴァリアン セミコンダクター イクイップメント アソシエイツ インコーポレイテッド
ヴァリアン セミコンダクター イクイップメント アソシエイツ インコーポレイテッド
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Publication of JP2013502726A publication Critical patent/JP2013502726A/ja
Publication of JP2013502726A5 publication Critical patent/JP2013502726A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G03F7/405—Treatment with inorganic or organometallic reagents after imagewise removal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
JP2012525726A 2009-08-20 2010-08-20 基板のパターニング方法及びそのシステム Expired - Fee Related JP5716026B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US23538309P 2009-08-20 2009-08-20
US61/235,383 2009-08-20
US12/859,606 2010-08-19
US12/859,606 US8912097B2 (en) 2009-08-20 2010-08-19 Method and system for patterning a substrate
PCT/US2010/046146 WO2011022635A2 (en) 2009-08-20 2010-08-20 Methods and system for patterning a substrate

Publications (3)

Publication Number Publication Date
JP2013502726A JP2013502726A (ja) 2013-01-24
JP2013502726A5 JP2013502726A5 (enExample) 2013-08-22
JP5716026B2 true JP5716026B2 (ja) 2015-05-13

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JP2012525726A Expired - Fee Related JP5716026B2 (ja) 2009-08-20 2010-08-20 基板のパターニング方法及びそのシステム

Country Status (6)

Country Link
US (1) US8912097B2 (enExample)
JP (1) JP5716026B2 (enExample)
KR (1) KR101662028B1 (enExample)
CN (1) CN102498543B (enExample)
TW (1) TW201129882A (enExample)
WO (1) WO2011022635A2 (enExample)

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KR101614628B1 (ko) * 2012-01-27 2016-04-21 아사히 가세이 이-매터리얼즈 가부시키가이샤 미세 요철 구조체, 건식 에칭용 열반응형 레지스트 재료, 몰드의 제조 방법 및 몰드
CN103456606B (zh) * 2012-06-04 2016-04-06 中芯国际集成电路制造(上海)有限公司 一种用于形成硬掩膜层的方法
US8716133B2 (en) * 2012-08-23 2014-05-06 International Business Machines Corporation Three photomask sidewall image transfer method
CN103681232B (zh) * 2012-09-04 2017-06-13 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
US9128384B2 (en) 2012-11-09 2015-09-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a pattern
FR3000601B1 (fr) * 2012-12-28 2016-12-09 Commissariat Energie Atomique Procede de formation des espaceurs d'une grille d'un transistor
US9411237B2 (en) * 2013-03-14 2016-08-09 Applied Materials, Inc. Resist hardening and development processes for semiconductor device manufacturing
US9541846B2 (en) 2013-09-06 2017-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Homogeneous thermal equalization with active device
CN104517813A (zh) * 2013-09-29 2015-04-15 中芯国际集成电路制造(上海)有限公司 双重图形的形成方法
US20150187915A1 (en) * 2013-12-26 2015-07-02 Samsung Electronics Co., Ltd. Method for fabricating fin type transistor
KR102185281B1 (ko) * 2014-01-09 2020-12-01 삼성전자 주식회사 자기 정렬 더블 패터닝 공정을 이용하여 반도체 소자의 패턴을 형성하는 방법
JP2015141929A (ja) 2014-01-27 2015-08-03 マイクロン テクノロジー， インク． 半導体装置及びその製造方法
US9754785B2 (en) 2015-01-14 2017-09-05 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices
KR102323251B1 (ko) 2015-01-21 2021-11-09 삼성전자주식회사 반도체 소자 및 반도체 소자의 제조방법
KR102343859B1 (ko) * 2015-01-29 2021-12-28 삼성전자주식회사 반도체 소자 및 이의 제조 방법
US9941125B2 (en) * 2015-08-31 2018-04-10 Taiwan Semiconductor Manufacturing Company, Ltd. Method for integrated circuit patterning
KR102323660B1 (ko) 2015-10-13 2021-11-08 삼성전자주식회사 반도체 소자 제조 방법
US9984889B2 (en) * 2016-03-08 2018-05-29 Varian Semiconductor Equipment Associates, Inc. Techniques for manipulating patterned features using ions
KR102216380B1 (ko) * 2016-12-08 2021-02-17 주식회사 원익아이피에스 반도체 소자의 패터닝 방법
US10545408B2 (en) 2017-08-18 2020-01-28 Varian Semiconductor Equipment Associates, Inc. Performance improvement of EUV photoresist by ion implantation
US10354874B2 (en) 2017-11-14 2019-07-16 Taiwan Semiconductor Manufacturing Co., Ltd. Directional processing to remove a layer or a material formed over a substrate
US10312089B1 (en) * 2017-11-29 2019-06-04 Taiwan Semiconductor Manufacturing Co., Ltd. Methods for controlling an end-to-end distance in semiconductor device
US20190198325A1 (en) 2017-12-22 2019-06-27 International Business Machines Corporation Extreme ultraviolet (euv) lithography patterning methods utilizing euv resist hardening
CN110528003B (zh) * 2018-05-25 2020-10-27 北京航空航天大学 一种涂层的复合制备方法
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TWI847663B (zh) * 2023-04-24 2024-07-01 南亞科技股份有限公司 半導體結構的形成方法
TWI885942B (zh) * 2023-04-24 2025-06-01 南亞科技股份有限公司 半導體結構的形成方法

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Also Published As

Publication number Publication date
WO2011022635A3 (en) 2011-04-21
WO2011022635A2 (en) 2011-02-24
JP2013502726A (ja) 2013-01-24
KR101662028B1 (ko) 2016-10-05
KR20120046311A (ko) 2012-05-09
CN102498543B (zh) 2015-01-21
US20110300711A1 (en) 2011-12-08
US8912097B2 (en) 2014-12-16
CN102498543A (zh) 2012-06-13
TW201129882A (en) 2011-09-01

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