TW201129882A - Method and system for patterning a substrate - Google Patents

Method and system for patterning a substrate

Info

Publication number
TW201129882A
TW201129882A TW099127942A TW99127942A TW201129882A TW 201129882 A TW201129882 A TW 201129882A TW 099127942 A TW099127942 A TW 099127942A TW 99127942 A TW99127942 A TW 99127942A TW 201129882 A TW201129882 A TW 201129882A
Authority
TW
Taiwan
Prior art keywords
array
features
resist features
substrate
sidewalls
Prior art date
Application number
TW099127942A
Other languages
English (en)
Chinese (zh)
Inventor
Patrick M Martin
Steven Carlson
Daniel Oh
Jung-Wook Park
Original Assignee
Varian Semiconductor Equipment
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Varian Semiconductor Equipment filed Critical Varian Semiconductor Equipment
Publication of TW201129882A publication Critical patent/TW201129882A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G03F7/405—Treatment with inorganic or organometallic reagents after imagewise removal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Organic Chemistry (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
TW099127942A 2009-08-20 2010-08-20 Method and system for patterning a substrate TW201129882A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US23538309P 2009-08-20 2009-08-20
US12/859,606 US8912097B2 (en) 2009-08-20 2010-08-19 Method and system for patterning a substrate

Publications (1)

Publication Number Publication Date
TW201129882A true TW201129882A (en) 2011-09-01

Family

ID=43063371

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099127942A TW201129882A (en) 2009-08-20 2010-08-20 Method and system for patterning a substrate

Country Status (6)

Country Link
US (1) US8912097B2 (enExample)
JP (1) JP5716026B2 (enExample)
KR (1) KR101662028B1 (enExample)
CN (1) CN102498543B (enExample)
TW (1) TW201129882A (enExample)
WO (1) WO2011022635A2 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9755049B2 (en) 2015-01-21 2017-09-05 Samsung Electronics Co., Ltd. Semiconductor devices including active patterns having different pitches and methods of fabricating the same
TWI677011B (zh) * 2015-01-29 2019-11-11 南韓商三星電子股份有限公司 製造半導體裝置的方法
TWI847663B (zh) * 2023-04-24 2024-07-01 南亞科技股份有限公司 半導體結構的形成方法
TWI885942B (zh) * 2023-04-24 2025-06-01 南亞科技股份有限公司 半導體結構的形成方法

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8778603B2 (en) 2010-03-15 2014-07-15 Varian Semiconductor Equipment Associates, Inc. Method and system for modifying substrate relief features using ion implantation
US8883649B2 (en) * 2011-03-23 2014-11-11 International Business Machines Corporation Sidewall image transfer process
KR20130015145A (ko) * 2011-08-02 2013-02-13 삼성전자주식회사 반도체 소자의 미세 패턴 형성 방법
EP2808735B1 (en) * 2012-01-27 2017-03-22 Asahi Kasei Kabushiki Kaisha Fine concavo-convex structure product, mold fabrication method, and use of a heat-reactive resist material
CN103456606B (zh) * 2012-06-04 2016-04-06 中芯国际集成电路制造(上海)有限公司 一种用于形成硬掩膜层的方法
US8716133B2 (en) * 2012-08-23 2014-05-06 International Business Machines Corporation Three photomask sidewall image transfer method
CN103681232B (zh) * 2012-09-04 2017-06-13 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
US9128384B2 (en) 2012-11-09 2015-09-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a pattern
FR3000601B1 (fr) 2012-12-28 2016-12-09 Commissariat Energie Atomique Procede de formation des espaceurs d'une grille d'un transistor
US9411237B2 (en) * 2013-03-14 2016-08-09 Applied Materials, Inc. Resist hardening and development processes for semiconductor device manufacturing
US9541846B2 (en) 2013-09-06 2017-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Homogeneous thermal equalization with active device
CN104517813A (zh) * 2013-09-29 2015-04-15 中芯国际集成电路制造(上海)有限公司 双重图形的形成方法
US20150187915A1 (en) * 2013-12-26 2015-07-02 Samsung Electronics Co., Ltd. Method for fabricating fin type transistor
KR102185281B1 (ko) * 2014-01-09 2020-12-01 삼성전자 주식회사 자기 정렬 더블 패터닝 공정을 이용하여 반도체 소자의 패턴을 형성하는 방법
JP2015141929A (ja) 2014-01-27 2015-08-03 マイクロン テクノロジー， インク． 半導体装置及びその製造方法
US9754785B2 (en) 2015-01-14 2017-09-05 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices
US9941125B2 (en) 2015-08-31 2018-04-10 Taiwan Semiconductor Manufacturing Company, Ltd. Method for integrated circuit patterning
KR102323660B1 (ko) 2015-10-13 2021-11-08 삼성전자주식회사 반도체 소자 제조 방법
US9984889B2 (en) * 2016-03-08 2018-05-29 Varian Semiconductor Equipment Associates, Inc. Techniques for manipulating patterned features using ions
KR102216380B1 (ko) * 2016-12-08 2021-02-17 주식회사 원익아이피에스 반도체 소자의 패터닝 방법
US10545408B2 (en) * 2017-08-18 2020-01-28 Varian Semiconductor Equipment Associates, Inc. Performance improvement of EUV photoresist by ion implantation
US10354874B2 (en) 2017-11-14 2019-07-16 Taiwan Semiconductor Manufacturing Co., Ltd. Directional processing to remove a layer or a material formed over a substrate
US10312089B1 (en) * 2017-11-29 2019-06-04 Taiwan Semiconductor Manufacturing Co., Ltd. Methods for controlling an end-to-end distance in semiconductor device
US20190198325A1 (en) 2017-12-22 2019-06-27 International Business Machines Corporation Extreme ultraviolet (euv) lithography patterning methods utilizing euv resist hardening
CN110528003B (zh) * 2018-05-25 2020-10-27 北京航空航天大学 一种涂层的复合制备方法
SG11202110987UA (en) * 2019-04-08 2021-10-28 Applied Materials Inc Methods for modifying photoresist profiles and tuning critical dimensions

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3317582B2 (ja) * 1994-06-01 2002-08-26 菱電セミコンダクタシステムエンジニアリング株式会社 微細パターンの形成方法
US5876903A (en) 1996-12-31 1999-03-02 Advanced Micro Devices Virtual hard mask for etching
JPH1126356A (ja) * 1997-07-08 1999-01-29 Sony Corp 半導体装置の製造方法
US6423475B1 (en) 1999-03-11 2002-07-23 Advanced Micro Devices, Inc. Sidewall formation for sidewall patterning of sub 100 nm structures
JP2000235969A (ja) 1999-02-15 2000-08-29 Sony Corp 半導体装置の製造方法
JP2001265011A (ja) * 2000-03-17 2001-09-28 Sanyo Electric Co Ltd 半導体装置の製造方法
US6645677B1 (en) * 2000-09-18 2003-11-11 Micronic Laser Systems Ab Dual layer reticle blank and manufacturing process
US6864144B2 (en) 2002-05-30 2005-03-08 Intel Corporation Method of stabilizing resist material through ion implantation
US6653735B1 (en) 2002-07-30 2003-11-25 Advanced Micro Devices, Inc. CVD silicon carbide layer as a BARC and hard mask for gate patterning
JP2004157424A (ja) * 2002-11-08 2004-06-03 Sony Corp レジストの剥離方法及び半導体装置の製造方法
DE102004058412B4 (de) * 2004-12-03 2017-03-02 Austriamicrosystems Ag Mehrfachmaske und Verfahren zur Herstellung unterschiedlich dotierter Gebiete und Verwendung des Verfahrens
KR100925029B1 (ko) 2006-12-27 2009-11-03 주식회사 하이닉스반도체 반도체 소자의 제조방법
KR100891247B1 (ko) * 2007-05-14 2009-04-01 주식회사 하이닉스반도체 반도체 소자의 패턴 형성 방법
JP4427562B2 (ja) 2007-06-11 2010-03-10 株式会社東芝 パターン形成方法
KR100858877B1 (ko) 2007-08-13 2008-09-17 주식회사 하이닉스반도체 반도체 소자 제조 방법
US8030218B2 (en) * 2008-03-21 2011-10-04 Micron Technology, Inc. Method for selectively modifying spacing between pitch multiplied structures
US8273634B2 (en) * 2008-12-04 2012-09-25 Micron Technology, Inc. Methods of fabricating substrates

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9755049B2 (en) 2015-01-21 2017-09-05 Samsung Electronics Co., Ltd. Semiconductor devices including active patterns having different pitches and methods of fabricating the same
TWI677011B (zh) * 2015-01-29 2019-11-11 南韓商三星電子股份有限公司 製造半導體裝置的方法
TWI847663B (zh) * 2023-04-24 2024-07-01 南亞科技股份有限公司 半導體結構的形成方法
TWI885942B (zh) * 2023-04-24 2025-06-01 南亞科技股份有限公司 半導體結構的形成方法

Also Published As

Publication number Publication date
CN102498543A (zh) 2012-06-13
KR20120046311A (ko) 2012-05-09
WO2011022635A3 (en) 2011-04-21
KR101662028B1 (ko) 2016-10-05
WO2011022635A2 (en) 2011-02-24
JP2013502726A (ja) 2013-01-24
CN102498543B (zh) 2015-01-21
US20110300711A1 (en) 2011-12-08
JP5716026B2 (ja) 2015-05-13
US8912097B2 (en) 2014-12-16

Similar Documents

Publication Publication Date Title
TW201129882A (en) Method and system for patterning a substrate
SG144148A1 (en) Stabilized photoresist structure for etching process
WO2012071192A3 (en) Sidewall image transfer pitch doubling and inline critical dimension slimming
WO2011056534A3 (en) Methods of forming pillars for memory cells using sequential sidewall patterning
TW200736820A (en) Method and system for enhanced lithographic patterning
EP2074648A4 (en) DEFLUORATION PROCESS
WO2008139848A1 (ja) フォトマスク用基板、フォトマスク用基板の成形部材、フォトマスク用基板の製造方法、フォトマスク、およびフォトマスクを用いた露光方法
GB2497185B (en) Finfet
WO2012151209A3 (en) Methods for fabricating high-density integrated circuit devices
MY159446A (en) Bulky sheet and method for producing same
WO2010047788A3 (en) Imprint lithography system and method
SG148135A1 (en) Frequency tripling using spacer mask having interposed regions
TW200728107A (en) Multi-layer body and method for producing the same
TW200746258A (en) Patterning sub-lithographic features with variable widths
TW200943473A (en) Method for fabricating pitch-doubling pillar structures
TW200707649A (en) Method for making a semiconductor device including a superlattice having at least one group of substantially undoped layers
WO2008064176A3 (en) Method and system for improving particle beam lithography
MX2013012090A (es) Proceso para fabricar una trama microtexturada.
WO2007137058A3 (en) Methods to reduce the minimum pitch in a pattern
WO2013012682A3 (en) Copper interconnects separated by air gaps and method of making thereof
TW200627074A (en) Eliminating printability of sub-resolution defects in imprint lithography
MX2015016032A (es) Metodo para producir un producto de papel absorbente con elementos visuales.
WO2010135120A3 (en) Selective self-aligned double patterning of regions in an integrated circuit device
TW200518258A (en) Method for forming narrow trench structure and method for forming gate structure with narrow spacing
WO2011067679A3 (en) Electromechanical systems, waveguides and methods of production