JP5615122B2 - 電子部品装置及びその製造方法 - Google Patents

電子部品装置及びその製造方法 Download PDF

Info

Publication number
JP5615122B2
JP5615122B2 JP2010229309A JP2010229309A JP5615122B2 JP 5615122 B2 JP5615122 B2 JP 5615122B2 JP 2010229309 A JP2010229309 A JP 2010229309A JP 2010229309 A JP2010229309 A JP 2010229309A JP 5615122 B2 JP5615122 B2 JP 5615122B2
Authority
JP
Japan
Prior art keywords
electrode
layer
electronic component
mems element
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2010229309A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012084681A5 (https=
JP2012084681A (ja
Inventor
田口　裕一
裕一 田口
白石　晶紀
晶紀 白石
東　光敏
光敏 東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2010229309A priority Critical patent/JP5615122B2/ja
Priority to US13/221,064 priority patent/US8878357B2/en
Publication of JP2012084681A publication Critical patent/JP2012084681A/ja
Publication of JP2012084681A5 publication Critical patent/JP2012084681A5/ja
Application granted granted Critical
Publication of JP5615122B2 publication Critical patent/JP5615122B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60—Seals
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
    • B81B7/0048—Packages or encapsulation for reducing stress inside of the package structure between the MEMS die and the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/153—Containers comprising an insulating or insulated base having interconnections in passages through the insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/01—Packaging MEMS
    • B81C2203/0172—Seals
    • B81C2203/019—Seals characterised by the material or arrangement of seals between parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7436—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to support a device or a wafer when forming electrical connections thereto
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Micromachines (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
JP2010229309A 2010-10-12 2010-10-12 電子部品装置及びその製造方法 Active JP5615122B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2010229309A JP5615122B2 (ja) 2010-10-12 2010-10-12 電子部品装置及びその製造方法
US13/221,064 US8878357B2 (en) 2010-10-12 2011-08-30 Electronic component device, method of manufacturing the same and wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010229309A JP5615122B2 (ja) 2010-10-12 2010-10-12 電子部品装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2012084681A JP2012084681A (ja) 2012-04-26
JP2012084681A5 JP2012084681A5 (https=) 2013-08-15
JP5615122B2 true JP5615122B2 (ja) 2014-10-29

Family

ID=45924492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010229309A Active JP5615122B2 (ja) 2010-10-12 2010-10-12 電子部品装置及びその製造方法

Country Status (2)

Country Link
US (1) US8878357B2 (https=)
JP (1) JP5615122B2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150191349A1 (en) * 2012-07-11 2015-07-09 Hewlett-Packard Development Company, L.P. Semiconductor secured to substrate via hole in substrate
CN104684840A (zh) 2012-07-31 2015-06-03 惠普发展公司，有限责任合伙企业 在半导体和衬底之间包括插入器的器件
JP6533066B2 (ja) * 2015-02-18 2019-06-19 ローム株式会社 電子装置
JP6852569B2 (ja) * 2017-05-30 2021-03-31 セイコーエプソン株式会社 Ｍｅｍｓ素子、電子機器および移動体
JP6635605B2 (ja) * 2017-10-11 2020-01-29 国立研究開発法人理化学研究所 電流導入端子並びにそれを備えた圧力保持装置及びｘ線撮像装置
CN114449729B (zh) * 2020-11-06 2023-11-10 中移物联网有限公司 一种主板保护结构及其装配方法
TWI753645B (zh) * 2020-11-12 2022-01-21 錼創顯示科技股份有限公司 微型發光二極體顯示器及其修補方法
WO2023080375A1 (ko) * 2021-11-02 2023-05-11 울산과학기술원 고온공정을 포함한 mems 제작공정에 적합한 실리콘 관통 전극 및 이의 제조방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006100552A (ja) * 2004-09-29 2006-04-13 Rohm Co Ltd 配線基板および半導体装置
JP2006179667A (ja) 2004-12-22 2006-07-06 Oki Electric Ind Co Ltd 半導体装置用パッケージ
KR100833508B1 (ko) * 2006-12-07 2008-05-29 한국전자통신연구원 멤즈 패키지 및 그 방법
JP2008192833A (ja) * 2007-02-05 2008-08-21 Shinko Electric Ind Co Ltd 半導体装置の製造方法
JP5318685B2 (ja) * 2008-09-26 2013-10-16 セイコーインスツル株式会社 電子部品およびその製造方法
JP5139347B2 (ja) * 2009-02-18 2013-02-06 新光電気工業株式会社 電子部品装置及びその製造方法

Also Published As

Publication number Publication date
US20120086116A1 (en) 2012-04-12
JP2012084681A (ja) 2012-04-26
US8878357B2 (en) 2014-11-04

Similar Documents

Publication Publication Date Title
JP5026038B2 (ja) 電子部品装置
JP5615122B2 (ja) 電子部品装置及びその製造方法
US6528344B2 (en) Chip scale surface-mountable packaging method for electronic and MEMS devices
JP5139347B2 (ja) 電子部品装置及びその製造方法
US20040259325A1 (en) Wafer level chip scale hermetic package
US8154115B1 (en) Package structure having MEMS element and fabrication method thereof
CN110329983B (zh) 用于mems传感器器件的晶片级封装及对应制造工艺
US20160221819A1 (en) Mems-cmos device that minimizes outgassing and methods of manufacture
TWI455265B (zh) 具微機電元件之封裝結構及其製法
CN105600738B (zh) 一种用于晶圆级封装的密闭结构及其制造方法
TWI431732B (zh) 半導體封裝件及其製法
TW201631715A (zh) 佈線基板、製造佈線基板之方法及電子組件裝置
TW201349414A (zh) 具微機電元件之封裝結構及其製法
JP4732824B2 (ja) 空洞部を備えたキャップウェハー、それを用いた半導体パッケージ、およびキャップウェハー製造方法
TWI388038B (zh) 感測元件結構與製造方法
US8039967B2 (en) Wiring substrate with a wire terminal
JP5248179B2 (ja) 電子装置の製造方法
TWI522308B (zh) 具微機電元件之封裝結構及其製法
JP2007227596A (ja) 半導体モジュール及びその製造方法
CN101987719B (zh) 感测元件结构与制造方法
JP5112659B2 (ja) 加速度センサならびにセンサチップおよびその製造方法
JP2014086963A (ja) パッケージおよびパッケージの製造方法
CN102464294B (zh) 具有微机电元件的封装结构的制造方法
JP2013173193A (ja) Ｍｅｍｓモジュール及びその製造方法
JP2011106841A (ja) センサーユニットおよびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130626

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130626

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140116

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140121

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140310

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140902

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140909

R150 Certificate of patent or registration of utility model

Ref document number: 5615122

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150