JP5615122B2 - 電子部品装置及びその製造方法 - Google Patents

電子部品装置及びその製造方法 Download PDF

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Publication number
JP5615122B2
JP5615122B2 JP2010229309A JP2010229309A JP5615122B2 JP 5615122 B2 JP5615122 B2 JP 5615122B2 JP 2010229309 A JP2010229309 A JP 2010229309A JP 2010229309 A JP2010229309 A JP 2010229309A JP 5615122 B2 JP5615122 B2 JP 5615122B2
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Prior art keywords
electrode
layer
electronic component
mems element
substrate
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Japanese (ja)
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JP2012084681A5 (enExample
JP2012084681A (ja
Inventor
田口　裕一
裕一 田口
白石　晶紀
晶紀 白石
東　光敏
光敏 東
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2010229309A priority Critical patent/JP5615122B2/ja
Priority to US13/221,064 priority patent/US8878357B2/en
Publication of JP2012084681A publication Critical patent/JP2012084681A/ja
Publication of JP2012084681A5 publication Critical patent/JP2012084681A5/ja
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    • H—ELECTRICITY
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    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
    • B81B7/0048—Packages or encapsulation for reducing stress inside of the package structure between the MEMS die and the substrate
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
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JP2010229309A 2010-10-12 2010-10-12 電子部品装置及びその製造方法 Active JP5615122B2 (ja)

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Application Number Priority Date Filing Date Title
JP2010229309A JP5615122B2 (ja) 2010-10-12 2010-10-12 電子部品装置及びその製造方法
US13/221,064 US8878357B2 (en) 2010-10-12 2011-08-30 Electronic component device, method of manufacturing the same and wiring substrate

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JP2010229309A JP5615122B2 (ja) 2010-10-12 2010-10-12 電子部品装置及びその製造方法

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JP2012084681A JP2012084681A (ja) 2012-04-26
JP2012084681A5 JP2012084681A5 (enExample) 2013-08-15
JP5615122B2 true JP5615122B2 (ja) 2014-10-29

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150191349A1 (en) * 2012-07-11 2015-07-09 Hewlett-Packard Development Company, L.P. Semiconductor secured to substrate via hole in substrate
WO2014021868A1 (en) 2012-07-31 2014-02-06 Hewlett-Packard Development Company, L.P. Device including interposer between semiconductor and substrate
JP6533066B2 (ja) * 2015-02-18 2019-06-19 ローム株式会社 電子装置
JP6852569B2 (ja) * 2017-05-30 2021-03-31 セイコーエプソン株式会社 Ｍｅｍｓ素子、電子機器および移動体
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