JP5611571B2 - 半導体基板の作製方法及び半導体装置の作製方法 - Google Patents

半導体基板の作製方法及び半導体装置の作製方法 Download PDF

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Publication number
JP5611571B2
JP5611571B2 JP2009262954A JP2009262954A JP5611571B2 JP 5611571 B2 JP5611571 B2 JP 5611571B2 JP 2009262954 A JP2009262954 A JP 2009262954A JP 2009262954 A JP2009262954 A JP 2009262954A JP 5611571 B2 JP5611571 B2 JP 5611571B2
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Japan
Prior art keywords
substrate
single crystal
crystal semiconductor
semiconductor layer
layer
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Expired - Fee Related
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JP2009262954A
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English (en)
Japanese (ja)
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JP2010153823A5 (enExample
JP2010153823A (ja
Inventor
史人 井坂
史人 井坂
翔 加藤
翔 加藤
祐 有田
祐 有田
下村　明久
明久 下村
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2009262954A priority Critical patent/JP5611571B2/ja
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Publication of JP2010153823A5 publication Critical patent/JP2010153823A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/17—Photovoltaic cells having only PIN junction potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/139—Manufacture or treatment of devices covered by this subclass using temporary substrates
    • H10F71/1395—Manufacture or treatment of devices covered by this subclass using temporary substrates for thin-film devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/12—Active materials
    • H10F77/122—Active materials comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Electroluminescent Light Sources (AREA)
  • Photovoltaic Devices (AREA)
JP2009262954A 2008-11-27 2009-11-18 半導体基板の作製方法及び半導体装置の作製方法 Expired - Fee Related JP5611571B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009262954A JP5611571B2 (ja) 2008-11-27 2009-11-18 半導体基板の作製方法及び半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008302169 2008-11-27
JP2008302169 2008-11-27
JP2009262954A JP5611571B2 (ja) 2008-11-27 2009-11-18 半導体基板の作製方法及び半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2010153823A JP2010153823A (ja) 2010-07-08
JP2010153823A5 JP2010153823A5 (enExample) 2013-01-10
JP5611571B2 true JP5611571B2 (ja) 2014-10-22

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Country Link
US (1) US8043935B2 (enExample)
JP (1) JP5611571B2 (enExample)
KR (1) KR101582247B1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2954057B2 (ja) 1996-12-27 1999-09-27 株式会社リヒトラブ 表 紙

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US8048754B2 (en) * 2008-09-29 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing single crystal semiconductor layer
JP2010114431A (ja) * 2008-10-10 2010-05-20 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
US20110073967A1 (en) * 2009-08-28 2011-03-31 Analog Devices, Inc. Apparatus and method of forming a mems acoustic transducer with layer transfer processes
WO2011025939A1 (en) * 2009-08-28 2011-03-03 Analog Devices, Inc. Dual single-crystal backplate microphone system and method of fabricating same
JP5755931B2 (ja) 2010-04-28 2015-07-29 株式会社半導体エネルギー研究所 半導体膜の作製方法、電極の作製方法、２次電池の作製方法、および太陽電池の作製方法
KR101089948B1 (ko) * 2010-04-30 2011-12-05 삼성전기주식회사 회로기판 및 이의 제조방법
JP5912404B2 (ja) 2010-10-29 2016-04-27 株式会社半導体エネルギー研究所 光電変換装置
FR2967813B1 (fr) 2010-11-18 2013-10-04 Soitec Silicon On Insulator Procédé de réalisation d'une structure a couche métallique enterrée
DE102011080009A1 (de) * 2011-07-28 2013-01-31 Robert Bosch Gmbh Dünnschicht-Solarzelle
FR2998089A1 (fr) * 2012-11-09 2014-05-16 Soitec Silicon On Insulator Procede de transfert de couche
FR3061802B1 (fr) * 2017-01-11 2019-08-16 Soitec Substrat pour capteur d'image de type face avant et procede de fabrication d'un tel substrat
TWI692869B (zh) * 2019-05-03 2020-05-01 世界先進積體電路股份有限公司 基底及其製造方法
FR3098643B1 (fr) * 2019-07-09 2023-01-13 Commissariat Energie Atomique Fabrication d'un dispositif photosensible à semiconducteur
KR102590568B1 (ko) 2021-07-06 2023-10-18 한국과학기술연구원 이종 접합 반도체 기판, 그의 제조방법 및 그를 이용한 전자소자
KR102793509B1 (ko) 2022-11-29 2025-04-11 한국과학기술연구원 이종 접합 반도체 유연기판, 그의 제조방법 및 그를 이용한 전자소자
KR20240080377A (ko) 2022-11-30 2024-06-07 한국과학기술연구원 유전특성이 우수한 이종 접합 반도체 기판, 그의 제조방법 및 그를 이용한 전자소자

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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Also Published As

Publication number Publication date
KR101582247B1 (ko) 2016-01-04
KR20100061348A (ko) 2010-06-07
US8043935B2 (en) 2011-10-25
US20100129948A1 (en) 2010-05-27
JP2010153823A (ja) 2010-07-08

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