JP2012069930A - 微結晶半導体膜の作製方法、及び半導体装置の作製方法 - Google Patents
微結晶半導体膜の作製方法、及び半導体装置の作製方法 Download PDFInfo
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Abstract
【解決手段】第1の条件により、高い結晶性の混相粒を低い粒密度で有する種結晶を絶縁膜上に形成した後、第2の条件により混相粒を成長させて混相粒の隙間を埋めるように、種結晶上に第1の微結晶半導体膜を形成し、第1の微結晶半導体膜上に、第1の微結晶半導体膜に含まれる混相粒の隙間を広げず、且つ結晶性の高い微結晶半導体膜を成膜する第3の条件で第2の微結晶半導体膜を積層形成する。
【選択図】図1
Description
本実施の形態では、混相粒の隙間を低減することで結晶性を高めた微結晶半導体膜の作製方法について、図1及び図2を用いて説明する。
本実施の形態では、本発明の一形態である半導体装置に形成される薄膜トランジスタの作製方法について、図3乃至図6を参照して説明する。なお、薄膜トランジスタは、p型よりもn型の方が、キャリアの移動度が高い。また、同一の基板上に形成する薄膜トランジスタを全て同じ極性に統一すると、工程数を抑えることができ、好ましい。そのため、本実施の形態では、n型の薄膜トランジスタの作製方法について説明する。
本実施の形態では、実施の形態2と比較して、さらに、オフ電流の低減が可能な薄膜トランジスタの作製方法について、図3及び図7を用いて説明する。
本実施の形態では、本発明の一態様である半導体装置に形成される薄膜トランジスタの作製方法について、図3、図5、及び図8を参照して説明する。図8は、図5(B)に示す工程に対応する工程である。
薄膜トランジスタを作製し、該薄膜トランジスタを画素部、さらには駆動回路に用いて表示機能を有する半導体装置(表示装置ともいう)を作製することができる。また、薄膜トランジスタを用いた駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
本実施の形態では、半導体装置の一形態である光電変換装置について、説明する。本実施の形態に示す光電変換装置では、半導体膜に実施の形態1に示すような、混相粒の隙間を低減することで結晶性を高めた微結晶半導体膜を採用する。混相粒の隙間を低減することで結晶性を高めた微結晶半導体膜が採用される半導体膜としては、光電変換を行う半導体膜や導電型を示す半導体膜などがあるが、特に、光電変換を行う半導体膜に採用することが好適である。または、光電変換を行う半導体膜や導電型を示す半導体膜と、他の膜との界面に、混相粒の隙間を低減することで結晶性を高めた微結晶半導体膜を採用することもできる。
本明細書に開示する半導体装置は、電子ペーパーとして適用することができる。電子ペーパーは、情報を表示するものであればあらゆる分野の電子機器に用いることが可能である。例えば、電子ペーパーを用いて、電子書籍(電子ブック)、ポスター、デジタルサイネージ、PID(Public Information Display)、電車などの乗り物の車内広告、クレジットカード等の各種カードにおける表示等に適用することができる。電子機器の一例を図10に示す。
本明細書に開示する半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。
Claims (9)
- 絶縁膜上に、第1の条件により、高い結晶性の混相粒を低い粒密度で有する種結晶を形成し、
前記種結晶上に、第2の条件により混相粒を成長させて前記混相粒の隙間を埋めるように第1の微結晶半導体膜を形成し、
前記第1の微結晶半導体膜上に、第1の微結晶半導体膜に含まれる混相粒の隙間を広げず、且つ結晶性の高い微結晶半導体膜を成膜する第3の条件により、第2の微結晶半導体膜を形成することを特徴とする微結晶半導体膜の作製方法。 - 絶縁膜上に、シリコンを含む堆積性気体の流量に対する水素の流量を50倍以上1000倍以下にして堆積性気体を希釈し、且つ処理室内の圧力を67Pa以上13332Pa以下とする第1の条件を用いたプラズマCVD法により種結晶を形成し、
前記種結晶上に、シリコンを含む堆積性気体の流量に対する水素の流量を100倍以上2000倍以下にして堆積性気体を希釈し、且つ前記処理室内の圧力を1333Pa以上13332Pa以下とする第2の条件を用いたプラズマCVD法により第1の微結晶半導体膜を形成し、
第1の微結晶半導体膜上に、シリコンを含む堆積性気体と、水素との流量比を交互に増減させながら前記処理室に供給し、且つ前記処理室内の圧力を1333Pa以上13332Pa以下とする第3の条件を用いたプラズマCVD法により第2の微結晶半導体膜を形成することを特徴とする微結晶半導体膜の作製方法。 - 基板上に、ゲート電極を形成し、
前記基板及び前記ゲート電極上にゲート絶縁膜を形成し、
前記ゲート絶縁膜上に、第1の条件により種結晶を形成し、
前記種結晶上に、第2の条件により第1の微結晶半導体膜を形成し、
第1の微結晶半導体膜上に、第3の条件により第2の微結晶半導体膜を形成し、
前記第2の微結晶半導体膜上に、微結晶半導体領域及び非晶質半導体領域を有する半導体膜を形成し、
前記半導体膜上に第1の不純物半導体膜を形成し、
前記第1の不純物半導体膜の一部をエッチングして、島状の第2の不純物半導体膜を形成し、
前記種結晶、前記第1の微結晶半導体膜、第2の微結晶半導体膜、及び前記半導体膜の一部をエッチングして、島状の第1の半導体積層体を形成し、
前記第2の不純物半導体膜上に、ソース電極及びドレイン電極として機能する配線を形成し、
前記第2の不純物半導体膜をエッチングして、ソース領域及びドレイン領域として機能する一対の不純物半導体膜を形成し、
前記第1の条件は、シリコンを含む堆積性気体の流量に対する水素の流量を50倍以上1000倍以下にして堆積性気体を希釈し、且つ処理室内の圧力を67Pa以上13332Pa以下とする条件であり、
前記第2の条件は、シリコンを含む堆積性気体の流量に対する水素の流量を100倍以上2000倍以下にして堆積性気体を希釈し、且つ前記処理室内の圧力を1333Pa以上13332Pa以下とする条件であり、
前記第3の条件は、シリコンを含む堆積性気体と、水素との、流量比を交互に増減させながら前記処理室に供給し、且つ前記処理室内の圧力を1333Pa以上13332Pa以下とする条件であることを特徴とする半導体装置の作製方法。 - 請求項3において、前記第1の半導体積層体を形成した後、且つ前記第1の半導体積層体上に、ソース電極及びドレイン電極として機能する配線を形成する前において、
前記第1の半導体積層体の側面をプラズマに曝して、前記第1の半導体積層体の側面に障壁領域を形成することを特徴とする半導体装置の作製方法。 - 請求項3または請求項4において、前記第1の半導体積層体の一部をエッチングして、微結晶半導体領域及び一対の非晶質半導体領域が積層される第2の半導体積層体を形成し、
前記配線、前記一対の不純物半導体膜、前記第2の半導体積層体、及び前記ゲート絶縁膜上に絶縁膜を形成し、
前記絶縁膜上に、バックゲート電極及び画素電極を形成することを特徴とする半導体装置の作製方法。 - 請求項5において、前記ゲート電極と前記バックゲート電極が平行であることを特徴とする半導体装置の作製方法。
- 請求項5において、前記ゲート電極と前記バックゲート電極が接続していることを特徴とする半導体装置の作製方法。
- 請求項5において、前記バックゲート電極はフローティングであることを特徴とする半導体装置の作製方法。
- 請求項5乃至請求項8のいずれか一項において、前記バックゲート電極及び前記画素電極を同時に形成することを特徴とする半導体装置の作製方法。
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