JP5549066B2 - リードフレーム型基板とその製造方法、及び半導体装置 - Google Patents
リードフレーム型基板とその製造方法、及び半導体装置 Download PDFInfo
- Publication number
- JP5549066B2 JP5549066B2 JP2008254312A JP2008254312A JP5549066B2 JP 5549066 B2 JP5549066 B2 JP 5549066B2 JP 2008254312 A JP2008254312 A JP 2008254312A JP 2008254312 A JP2008254312 A JP 2008254312A JP 5549066 B2 JP5549066 B2 JP 5549066B2
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- Prior art keywords
- connection terminal
- semiconductor element
- lead frame
- external connection
- metal plate
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Die Bonding (AREA)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008254312A JP5549066B2 (ja) | 2008-09-30 | 2008-09-30 | リードフレーム型基板とその製造方法、及び半導体装置 |
| TW098132930A TWI502711B (zh) | 2008-09-30 | 2009-09-29 | 導線架基板及其製造方法與半導體裝置 |
| KR1020117006885A KR101602982B1 (ko) | 2008-09-30 | 2009-09-30 | 리드 프레임 기판과 그 제조 방법, 및 반도체 장치 |
| PCT/JP2009/005041 WO2010038452A1 (ja) | 2008-09-30 | 2009-09-30 | リードフレーム基板とその製造方法、及び半導体装置 |
| CN200980138144.0A CN102165585B (zh) | 2008-09-30 | 2009-09-30 | 引线框基板及其制造方法、半导体器件 |
| US13/064,205 US8558363B2 (en) | 2008-09-30 | 2011-03-10 | Lead frame substrate and method of manufacturing the same, and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008254312A JP5549066B2 (ja) | 2008-09-30 | 2008-09-30 | リードフレーム型基板とその製造方法、及び半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010087221A JP2010087221A (ja) | 2010-04-15 |
| JP2010087221A5 JP2010087221A5 (enExample) | 2011-08-18 |
| JP5549066B2 true JP5549066B2 (ja) | 2014-07-16 |
Family
ID=42073232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008254312A Expired - Fee Related JP5549066B2 (ja) | 2008-09-30 | 2008-09-30 | リードフレーム型基板とその製造方法、及び半導体装置 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8558363B2 (enExample) |
| JP (1) | JP5549066B2 (enExample) |
| KR (1) | KR101602982B1 (enExample) |
| CN (1) | CN102165585B (enExample) |
| TW (1) | TWI502711B (enExample) |
| WO (1) | WO2010038452A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI427716B (zh) * | 2010-06-04 | 2014-02-21 | 矽品精密工業股份有限公司 | 無載具之半導體封裝件及其製法 |
| US8673689B2 (en) * | 2011-01-28 | 2014-03-18 | Marvell World Trade Ltd. | Single layer BGA substrate process |
| CN102244060B (zh) * | 2011-06-02 | 2013-09-25 | 日月光半导体制造股份有限公司 | 封装基板及其制造方法 |
| US9142502B2 (en) * | 2011-08-31 | 2015-09-22 | Zhiwei Gong | Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits |
| US8916421B2 (en) * | 2011-08-31 | 2014-12-23 | Freescale Semiconductor, Inc. | Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits |
| US8597983B2 (en) | 2011-11-18 | 2013-12-03 | Freescale Semiconductor, Inc. | Semiconductor device packaging having substrate with pre-encapsulation through via formation |
| JP2014072242A (ja) | 2012-09-27 | 2014-04-21 | Rohm Co Ltd | チップ部品およびその製造方法 |
| KR101505088B1 (ko) * | 2013-10-22 | 2015-03-23 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지와 리드프레임 패들 구조 및 방법 |
| JP6266351B2 (ja) * | 2014-01-08 | 2018-01-24 | 新日本無線株式会社 | センサ装置およびその製造方法 |
| JP7182374B2 (ja) * | 2017-05-15 | 2022-12-02 | 新光電気工業株式会社 | リードフレーム及びその製造方法 |
| JP7039245B2 (ja) * | 2017-10-18 | 2022-03-22 | 新光電気工業株式会社 | リードフレーム及びその製造方法と電子部品装置 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH09307043A (ja) * | 1996-05-10 | 1997-11-28 | Dainippon Printing Co Ltd | リードフレーム部材とその製造方法、および該リードフレーム部材を用いた半導体装置 |
| JP3642911B2 (ja) | 1997-02-05 | 2005-04-27 | 大日本印刷株式会社 | リードフレーム部材とその製造方法 |
| US6281568B1 (en) * | 1998-10-21 | 2001-08-28 | Amkor Technology, Inc. | Plastic integrated circuit device package and leadframe having partially undercut leads and die pad |
| JP3169919B2 (ja) * | 1998-12-21 | 2001-05-28 | 九州日本電気株式会社 | ボールグリッドアレイ型半導体装置及びその製造方法 |
| MY133357A (en) * | 1999-06-30 | 2007-11-30 | Hitachi Ltd | A semiconductor device and a method of manufacturing the same |
| KR100677651B1 (ko) * | 2001-04-13 | 2007-02-01 | 야마하 가부시키가이샤 | 반도체 소자 및 패키지와 그 제조방법 |
| KR100908891B1 (ko) * | 2001-07-09 | 2009-07-23 | 스미토모 긴조쿠 고잔 가부시키가이샤 | 리드 프레임 및 그 제조방법 |
| JP2003309241A (ja) * | 2002-04-15 | 2003-10-31 | Dainippon Printing Co Ltd | リードフレーム部材とリードフレーム部材の製造方法、及び該リードフレーム部材を用いた半導体パッケージとその製造方法 |
| JP2003309242A (ja) * | 2002-04-15 | 2003-10-31 | Dainippon Printing Co Ltd | リードフレーム部材とリードフレーム部材の製造方法、及び該リードフレーム部材を用いた半導体パッケージとその製造方法 |
| KR100993579B1 (ko) * | 2002-04-30 | 2010-11-10 | 르네사스 일렉트로닉스 가부시키가이샤 | 반도체장치 및 전자 장치 |
| JP4351150B2 (ja) * | 2002-04-30 | 2009-10-28 | 株式会社ルネサステクノロジ | 半導体装置及び電子装置 |
| EP1604401B1 (en) * | 2003-03-07 | 2008-03-05 | Nxp B.V. | Semiconductor device, semiconductor body and method of manufacturing thereof |
| JP2004349316A (ja) * | 2003-05-20 | 2004-12-09 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| JP4349063B2 (ja) * | 2003-10-08 | 2009-10-21 | 株式会社村田製作所 | 弾性表面波装置の製造方法 |
| JP2005175261A (ja) * | 2003-12-12 | 2005-06-30 | Fujitsu Ten Ltd | 基板の電子部品実装構造および方法 |
| JP2005191240A (ja) * | 2003-12-25 | 2005-07-14 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| JP4417150B2 (ja) * | 2004-03-23 | 2010-02-17 | 株式会社ルネサステクノロジ | 半導体装置 |
| TWI262587B (en) * | 2005-03-08 | 2006-09-21 | Yi-Ling Jang | Leadframe and the manufacturing method thereof |
| US7687893B2 (en) * | 2006-12-27 | 2010-03-30 | Amkor Technology, Inc. | Semiconductor package having leadframe with exposed anchor pads |
| US8008784B2 (en) * | 2008-10-02 | 2011-08-30 | Advanced Semiconductor Engineering, Inc. | Package including a lead frame, a chip and a sealant |
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2008
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Also Published As
| Publication number | Publication date |
|---|---|
| KR101602982B1 (ko) | 2016-03-11 |
| WO2010038452A1 (ja) | 2010-04-08 |
| KR20110074514A (ko) | 2011-06-30 |
| TWI502711B (zh) | 2015-10-01 |
| CN102165585A (zh) | 2011-08-24 |
| JP2010087221A (ja) | 2010-04-15 |
| TW201021186A (en) | 2010-06-01 |
| US20110163435A1 (en) | 2011-07-07 |
| CN102165585B (zh) | 2014-03-26 |
| US8558363B2 (en) | 2013-10-15 |
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