JP5504149B2 - 多層配線基板 - Google Patents

多層配線基板 Download PDF

Info

Publication number
JP5504149B2
JP5504149B2 JP2010285410A JP2010285410A JP5504149B2 JP 5504149 B2 JP5504149 B2 JP 5504149B2 JP 2010285410 A JP2010285410 A JP 2010285410A JP 2010285410 A JP2010285410 A JP 2010285410A JP 5504149 B2 JP5504149 B2 JP 5504149B2
Authority
JP
Japan
Prior art keywords
main surface
terminal
wiring board
multilayer wiring
surface side
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010285410A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011155251A (ja
JP2011155251A5 (ko
Inventor
真之介 前田
哲夫 鈴木
篤彦 杉本
達也 伊藤
琢也 半戸
訓 平野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Spark Plug Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2010285410A priority Critical patent/JP5504149B2/ja
Publication of JP2011155251A publication Critical patent/JP2011155251A/ja
Publication of JP2011155251A5 publication Critical patent/JP2011155251A5/ja
Application granted granted Critical
Publication of JP5504149B2 publication Critical patent/JP5504149B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06Thermal details
    • H05K2201/068Thermal details wherein the coefficient of thermal expansion is important
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/094Array of pads or lands differing from one another, e.g. in size, pitch, thickness; Using different connections on the pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • H05K2201/09527Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/099Coating over pads, e.g. solder resist partly over pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0346Deburring, rounding, bevelling or smoothing conductor edges
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0369Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H05K3/383Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by microetching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
JP2010285410A 2009-12-28 2010-12-22 多層配線基板 Expired - Fee Related JP5504149B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010285410A JP5504149B2 (ja) 2009-12-28 2010-12-22 多層配線基板

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2009296912 2009-12-28
JP2009296912 2009-12-28
JP2010285410A JP5504149B2 (ja) 2009-12-28 2010-12-22 多層配線基板

Publications (3)

Publication Number Publication Date
JP2011155251A JP2011155251A (ja) 2011-08-11
JP2011155251A5 JP2011155251A5 (ko) 2013-06-27
JP5504149B2 true JP5504149B2 (ja) 2014-05-28

Family

ID=44175926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010285410A Expired - Fee Related JP5504149B2 (ja) 2009-12-28 2010-12-22 多層配線基板

Country Status (5)

Country Link
US (1) US8581388B2 (ko)
JP (1) JP5504149B2 (ko)
KR (1) KR101323541B1 (ko)
CN (1) CN102111951B (ko)
TW (1) TWI449480B (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5566720B2 (ja) * 2010-02-16 2014-08-06 日本特殊陶業株式会社 多層配線基板及びその製造方法
JP6166879B2 (ja) * 2011-09-06 2017-07-19 株式会社 大昌電子 片面プリント配線板およびその製造方法
JP2013135080A (ja) * 2011-12-26 2013-07-08 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
JP6110084B2 (ja) * 2012-07-06 2017-04-05 株式会社 大昌電子 プリント配線板およびその製造方法
KR20150002492A (ko) * 2013-06-28 2015-01-07 쿄세라 서킷 솔루션즈 가부시키가이샤 배선 기판
WO2016143117A1 (ja) * 2015-03-12 2016-09-15 三井金属鉱業株式会社 キャリア付き金属箔及び配線基板の製造方法
US10015876B2 (en) * 2015-03-31 2018-07-03 Tanazawa Hakkosha Co., Ltd. Printed board and method for manufacturing same
CN106550532A (zh) * 2015-09-17 2017-03-29 奥特斯(中国)有限公司 用于制造部件载体的包括低流动性材料的保护结构
DE112016004812T5 (de) * 2015-10-22 2018-08-16 Asahi Glass Company, Limited Verfahren zur Herstellung eines Verdrahtungssubstrats
JP2016105512A (ja) * 2016-03-01 2016-06-09 京セラサーキットソリューションズ株式会社 配線基板の製造方法
CN111554641A (zh) * 2020-05-11 2020-08-18 上海天马微电子有限公司 半导体封装件及其制作方法
WO2022170162A1 (en) * 2021-02-05 2022-08-11 Qorvo Us, Inc. Electronic device comprising a single dielectric layer for solder mask and cavity and method for fabricating the same
KR102649163B1 (ko) * 2021-03-09 2024-03-20 미쓰비시덴키 가부시키가이샤 회로 기판

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4899265B2 (ja) 2000-11-16 2012-03-21 凸版印刷株式会社 多層配線基板及びその製造方法、並びにレーザードリル装置
JP2002290022A (ja) * 2001-03-27 2002-10-04 Kyocera Corp 配線基板およびその製造方法ならびに電子装置
JP2003133711A (ja) 2001-10-23 2003-05-09 Matsushita Electric Ind Co Ltd プリント配線板とその製造方法および電子部品の実装方法
JP3811680B2 (ja) * 2003-01-29 2006-08-23 富士通株式会社 配線基板の製造方法
JP4460341B2 (ja) * 2004-04-09 2010-05-12 日本特殊陶業株式会社 配線基板およびその製造方法
JP4334005B2 (ja) 2005-12-07 2009-09-16 新光電気工業株式会社 配線基板の製造方法及び電子部品実装構造体の製造方法
TWI295550B (en) * 2005-12-20 2008-04-01 Phoenix Prec Technology Corp Structure of circuit board and method for fabricating the same
JP2007173622A (ja) * 2005-12-22 2007-07-05 Kyocer Slc Technologies Corp 配線基板の製造方法
JP5324051B2 (ja) * 2007-03-29 2013-10-23 新光電気工業株式会社 配線基板の製造方法及び半導体装置の製造方法及び配線基板
JP4881211B2 (ja) * 2007-04-13 2012-02-22 新光電気工業株式会社 配線基板の製造方法及び半導体装置の製造方法及び配線基板
JP5101169B2 (ja) * 2007-05-30 2012-12-19 新光電気工業株式会社 配線基板とその製造方法
JP5179920B2 (ja) 2008-03-28 2013-04-10 日本特殊陶業株式会社 多層配線基板
JP5203108B2 (ja) * 2008-09-12 2013-06-05 新光電気工業株式会社 配線基板及びその製造方法
JP5566720B2 (ja) * 2010-02-16 2014-08-06 日本特殊陶業株式会社 多層配線基板及びその製造方法
JP5623308B2 (ja) * 2010-02-26 2014-11-12 日本特殊陶業株式会社 多層配線基板及びその製造方法
JP2011181542A (ja) * 2010-02-26 2011-09-15 Ngk Spark Plug Co Ltd 多層配線基板及びその製造方法
JP2012094662A (ja) * 2010-10-26 2012-05-17 Ngk Spark Plug Co Ltd 多層配線基板の製造方法

Also Published As

Publication number Publication date
US20110156272A1 (en) 2011-06-30
US8581388B2 (en) 2013-11-12
CN102111951A (zh) 2011-06-29
KR20110076805A (ko) 2011-07-06
JP2011155251A (ja) 2011-08-11
KR101323541B1 (ko) 2013-10-29
CN102111951B (zh) 2014-09-17
TWI449480B (zh) 2014-08-11
TW201134329A (en) 2011-10-01

Similar Documents

Publication Publication Date Title
JP5504149B2 (ja) 多層配線基板
JP5566720B2 (ja) 多層配線基板及びその製造方法
JP5436259B2 (ja) 多層配線基板の製造方法及び多層配線基板
JP5623308B2 (ja) 多層配線基板及びその製造方法
KR101375998B1 (ko) 다층 배선기판의 제조방법 및 다층 배선기판
JP5566771B2 (ja) 多層配線基板
JP5848110B2 (ja) 多層配線基板の製造方法
KR101281410B1 (ko) 다층 배선기판
JP5462777B2 (ja) 多層配線基板の製造方法
JP2012094662A (ja) 多層配線基板の製造方法
US8450622B2 (en) Multilayer wiring substrate and method of manufacturing the same
JP5638269B2 (ja) 多層配線基板
JP5269757B2 (ja) 多層配線基板

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130515

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130515

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20131122

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131203

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140203

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140225

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140317

R150 Certificate of patent or registration of utility model

Ref document number: 5504149

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees