JP5399650B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5399650B2 JP5399650B2 JP2008129646A JP2008129646A JP5399650B2 JP 5399650 B2 JP5399650 B2 JP 5399650B2 JP 2008129646 A JP2008129646 A JP 2008129646A JP 2008129646 A JP2008129646 A JP 2008129646A JP 5399650 B2 JP5399650 B2 JP 5399650B2
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- 239000004065 semiconductor Substances 0.000 title claims description 96
- 239000012535 impurity Substances 0.000 claims description 46
- 230000015556 catabolic process Effects 0.000 claims description 28
- 238000000605 extraction Methods 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 18
- 230000001681 protective effect Effects 0.000 description 11
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000002513 implantation Methods 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000002955 isolation Methods 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1004—Base region of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
Description
半導体装置200は、p−の半導体基板202およびn−のエピタキシャル層204により構成された半導体層206と、半導体基板202とエピタキシャル層204との間に設けられたn+の不純物埋込層208と、不純物埋込層208に接続されるとともに半導体層206表面に設けられたn+のシンカー210と、シンカー210により囲まれた領域において、半導体層206表面に形成されたn−のディープウェル212と、ディープウェル212中に形成されたpのベース領域214と、ベース領域214中に形成されたp+のベース引出領域218およびn+のエミッタ領域220と、シンカー210中に形成されたn+のコレクタ引出領域222と、を含む。
半導体層と、
前記半導体層表面に形成された第1導電型のディープウェルと、
前記半導体層表面に形成されるとともに前記ディープウェル中に形成された第2導電型の第1のベース領域と、
前記半導体層表面に形成されるとともに前記第1のベース領域中に形成された第1導電型のエミッタ領域と、
前記半導体層表面において前記第1のベース領域から離間して設けられた第1導電型のコレクタ引出領域と、
前記ディープウェル中に形成され、前記半導体層表面において前記第1のベース領域と前記コレクタ引出領域との間に前記第1のベース領域に接続して設けられ、前記第1のベース領域よりも不純物濃度が低く、前記第1のベース領域よりも深さが浅く形成された第2導電型の第2のベース領域と、
を含むバイポーラトランジスタを含む半導体装置が提供される。
まず、コレクタ(コレクタ引出領域122)に電圧を印加すると、第2のベース領域116の下方および側方から空乏化が進行し、比較的低い電圧で第2のベース領域116が完全に空乏化される。たとえば、第2のベース領域116の濃度を3×1016cm−3 、第2のベース領域116の深さを1μm、ディープウェル112の濃度を3×1016cm−3とすると、以下の式から、約45V程度で第2のベース領域116が完全に空乏化される。
V0=(k×T/q)×ln(Na×Nd/ni 2)
W:空乏層幅
ε0:真空中の誘電率
εr:シリコンの比誘電率
V0:0バイアス時のpn接触電位差
V:印加電圧
Na:p型不純物濃度
Nd:n型不純物濃度
q:電子の電荷量
k:ボルツマン定数
T:温度
ni:真性キャリア密度
MOSトランジスタ150は、半導体層106表面に形成されたソース領域152およびドレイン領域154と、ソース領域152周囲に形成された第1のチャネル領域156と、ドレイン領域154周囲に形成され、第1のチャネル領域156よりも不純物濃度が低い第2のチャネル領域158と、ソース領域152とドレイン領域154との間の領域において半導体層106上に形成されたゲート電極160とを含む。MOSトランジスタ150は、高い耐圧と低いオン抵抗を達成するためにPN接合の空乏化を利用する、いわゆるRESURF構造を有する。
102 半導体基板
104 エピタキシャル層
106 半導体層
108a 不純物注入領域
108 不純物埋込層
110 シンカー
112 ディープウェル
114 第1のベース領域
116 第2のベース領域
118 ベース引出領域
120 エミッタ領域
122 コレクタ引出領域
124 素子分離絶縁膜
130 第1の保護膜
132 第2の保護膜
134 第3の保護膜
150 トランジスタ
152 ソース領域
154 ドレイン領域
156 第1のチャネル領域
158 第2のチャネル領域
160 ゲート電極
200 半導体装置
202 半導体基板
204 エピタキシャル層
206 半導体層
208 不純物埋込層
210 シンカー
212 ディープウェル
214 ベース領域
218 ベース引出領域
220 エミッタ領域
222 コレクタ引出領域
Claims (3)
- 第2導電型の半導体基板と、
前記半導体基板上に形成された半導体層と、
前記半導体層表面に形成された第1導電型のディープウェルと、
前記半導体層表面に形成されるとともに前記ディープウェル中に形成された第2導電型の第1のベース領域と、
前記半導体層表面に形成されるとともに前記第1のベース領域中に形成された第1導電型のエミッタ領域と、
前記半導体層表面において前記第1のベース領域から離間して設けられた第1導電型のコレクタ引出領域と、
前記ディープウェル中に形成され、前記半導体層表面において前記第1のベース領域と前記コレクタ引出領域との間に前記第1のベース領域に接続して設けられ、前記第1のベース領域よりも不純物濃度が低く、前記第1のベース領域よりも深さが浅く形成された第2導電型の第2のベース領域と、
を含み、
前記第2のベース領域のうち前記第1のベース領域に接続していない部分は、前記ディープウェルに接しているバイポーラトランジスタを含む半導体装置。 - 請求項1に記載の半導体装置において、
前記第2のベース領域は、前記コレクタ引出領域に、アバランシェブレークダウン電圧以下の所定の電圧が印加されたときに、前記ディープウェル中の前記第1導電型の不純物により完全に空乏化される半導体装置。 - 請求項1または2に記載の半導体装置において、
前記バイポーラトランジスタは、前記半導体層中の前記ディープウェル領域下方に形成され、前記ディープウェル領域よりも不純物濃度の高い第1導電型の埋込領域をさらに含み、当該埋込領域を介して電流が流れる半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008129646A JP5399650B2 (ja) | 2007-05-18 | 2008-05-16 | 半導体装置 |
Applications Claiming Priority (3)
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JP2007133379 | 2007-05-18 | ||
JP2007133379 | 2007-05-18 | ||
JP2008129646A JP5399650B2 (ja) | 2007-05-18 | 2008-05-16 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
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JP2009004763A JP2009004763A (ja) | 2009-01-08 |
JP5399650B2 true JP5399650B2 (ja) | 2014-01-29 |
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JP2008129646A Expired - Fee Related JP5399650B2 (ja) | 2007-05-18 | 2008-05-16 | 半導体装置 |
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US (1) | US7667295B2 (ja) |
JP (1) | JP5399650B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5567927B2 (ja) | 2010-07-29 | 2014-08-06 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5546991B2 (ja) | 2010-08-09 | 2014-07-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5641879B2 (ja) | 2010-11-02 | 2014-12-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6271157B2 (ja) * | 2013-05-24 | 2018-01-31 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN108155226A (zh) * | 2017-12-22 | 2018-06-12 | 杭州士兰微电子股份有限公司 | Npn型三极管及其制造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6197969A (ja) * | 1984-10-19 | 1986-05-16 | Matsushita Electronics Corp | 半導体装置 |
JPH02102541A (ja) | 1988-10-11 | 1990-04-16 | Nec Corp | 半導体装置 |
JPH1098120A (ja) * | 1996-09-19 | 1998-04-14 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US5786622A (en) * | 1997-05-16 | 1998-07-28 | Tritech Microelectronics International Ltd. | Bipolar transistor with a ring emitter |
JP4623800B2 (ja) | 2000-07-07 | 2011-02-02 | 三洋電機株式会社 | 半導体集積回路装置 |
JP4043246B2 (ja) | 2002-01-31 | 2008-02-06 | 三洋電機株式会社 | 光半導体集積回路装置 |
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2008
- 2008-05-16 JP JP2008129646A patent/JP5399650B2/ja not_active Expired - Fee Related
- 2008-05-16 US US12/153,345 patent/US7667295B2/en active Active
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JP2009004763A (ja) | 2009-01-08 |
US20080283967A1 (en) | 2008-11-20 |
US7667295B2 (en) | 2010-02-23 |
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