JP5390246B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5390246B2
JP5390246B2 JP2009101860A JP2009101860A JP5390246B2 JP 5390246 B2 JP5390246 B2 JP 5390246B2 JP 2009101860 A JP2009101860 A JP 2009101860A JP 2009101860 A JP2009101860 A JP 2009101860A JP 5390246 B2 JP5390246 B2 JP 5390246B2
Authority
JP
Japan
Prior art keywords
connection terminal
bonding wire
semiconductor chip
inductor
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009101860A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010251641A5 (https=
JP2010251641A (ja
Inventor
正之 冨留宮
康隆 中柴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2009101860A priority Critical patent/JP5390246B2/ja
Priority to US12/662,441 priority patent/US8350357B2/en
Publication of JP2010251641A publication Critical patent/JP2010251641A/ja
Publication of JP2010251641A5 publication Critical patent/JP2010251641A5/ja
Application granted granted Critical
Publication of JP5390246B2 publication Critical patent/JP5390246B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F19/00—Fixed transformers or mutual inductances of the signal type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/497—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2009101860A 2009-04-20 2009-04-20 半導体装置 Expired - Fee Related JP5390246B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009101860A JP5390246B2 (ja) 2009-04-20 2009-04-20 半導体装置
US12/662,441 US8350357B2 (en) 2009-04-20 2010-04-16 Semiconductor device including an inductor that is inductively coupled to another inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009101860A JP5390246B2 (ja) 2009-04-20 2009-04-20 半導体装置

Publications (3)

Publication Number Publication Date
JP2010251641A JP2010251641A (ja) 2010-11-04
JP2010251641A5 JP2010251641A5 (https=) 2012-06-07
JP5390246B2 true JP5390246B2 (ja) 2014-01-15

Family

ID=42991367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009101860A Expired - Fee Related JP5390246B2 (ja) 2009-04-20 2009-04-20 半導体装置

Country Status (2)

Country Link
US (1) US8350357B2 (https=)
JP (1) JP5390246B2 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5578797B2 (ja) * 2009-03-13 2014-08-27 ルネサスエレクトロニクス株式会社 半導体装置
JP6129659B2 (ja) * 2013-06-25 2017-05-17 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8981842B1 (en) * 2013-10-25 2015-03-17 Taiwan Semiconductor Manufacturing Company Limited Integrated circuit comprising buffer chain

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3997851A (en) * 1976-01-28 1976-12-14 The United States Of America As Represented By The Secretary Of The Army RF-drive equalizer for multicell microwave transistor
JPH05167427A (ja) * 1991-12-13 1993-07-02 Toshiba Corp レベルシフト回路
JPH09106915A (ja) * 1995-10-13 1997-04-22 Matsushita Electric Ind Co Ltd 高周波用インダクタ
JPH1074625A (ja) 1996-08-30 1998-03-17 Ikeda Takeshi インダクタ素子
JP2002164214A (ja) * 2000-10-27 2002-06-07 Xerox Corp ボンディングワイヤを使用する非同一面マイクロコイル及びその製造方法
US6545227B2 (en) * 2001-07-11 2003-04-08 Mce/Kdi Corporation Pocket mounted chip having microstrip line
JP2005039023A (ja) 2003-07-14 2005-02-10 Yokogawa Electric Corp インダクタンス素子及びその製造方法
JP2010041499A (ja) * 2008-08-06 2010-02-18 Toshiba Corp 信号カプラ
US7902665B2 (en) * 2008-09-02 2011-03-08 Linear Technology Corporation Semiconductor device having a suspended isolating interconnect

Also Published As

Publication number Publication date
JP2010251641A (ja) 2010-11-04
US8350357B2 (en) 2013-01-08
US20100270642A1 (en) 2010-10-28

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