JP5379418B2 - 半導体装置のテスト構造物 - Google Patents
半導体装置のテスト構造物 Download PDFInfo
- Publication number
- JP5379418B2 JP5379418B2 JP2008187486A JP2008187486A JP5379418B2 JP 5379418 B2 JP5379418 B2 JP 5379418B2 JP 2008187486 A JP2008187486 A JP 2008187486A JP 2008187486 A JP2008187486 A JP 2008187486A JP 5379418 B2 JP5379418 B2 JP 5379418B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- gate line
- region
- dummy
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Automation & Control Theory (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020070071708A KR101330084B1 (ko) | 2007-07-18 | 2007-07-18 | 반도체 장치의 테스트 구조물, 그 형성 방법, 반도체 장치및 이의 제조 방법 |
| KR10-2007-0071708 | 2007-07-18 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009027169A JP2009027169A (ja) | 2009-02-05 |
| JP2009027169A5 JP2009027169A5 (enExample) | 2011-09-01 |
| JP5379418B2 true JP5379418B2 (ja) | 2013-12-25 |
Family
ID=40264097
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008187486A Expired - Fee Related JP5379418B2 (ja) | 2007-07-18 | 2008-07-18 | 半導体装置のテスト構造物 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7851864B2 (enExample) |
| JP (1) | JP5379418B2 (enExample) |
| KR (1) | KR101330084B1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8723177B2 (en) | 2011-12-06 | 2014-05-13 | Globalfoundries Inc. | Electrical test structure for devices employing high-k dielectrics or metal gates |
| US8766256B2 (en) | 2012-06-12 | 2014-07-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | SiGe SRAM butted contact resistance improvement |
| KR20200078968A (ko) | 2018-12-24 | 2020-07-02 | 에스케이하이닉스 주식회사 | 반도체 장치 |
| CN112992864B (zh) * | 2021-02-20 | 2023-12-12 | 长江存储科技有限责任公司 | 一种半导体测试结构和测试方法 |
| US12020993B2 (en) * | 2021-03-11 | 2024-06-25 | Taiwan Semiconductor Manufacturing Company Ltd. | Test structure and testing method thereof |
| CN115831926B (zh) * | 2021-09-17 | 2025-09-05 | 长鑫存储技术有限公司 | 晶圆的测试结构及其制备方法 |
| CN116936568A (zh) * | 2022-04-12 | 2023-10-24 | 长鑫存储技术有限公司 | 半导体版图结构及半导体测试结构 |
| CN117352496A (zh) * | 2022-06-29 | 2024-01-05 | 长鑫存储技术有限公司 | 半导体测试结构及其制备方法、测试方法 |
| CN115799090B (zh) * | 2022-11-17 | 2025-05-30 | 长鑫存储技术有限公司 | 半导体结构的测试方法、半导体测试结构及其制备方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3132582B2 (ja) * | 1991-07-12 | 2001-02-05 | 日本電気株式会社 | 半導体装置 |
| JPH11345885A (ja) | 1998-06-02 | 1999-12-14 | Nec Corp | 半導体装置 |
| KR100275964B1 (ko) | 1998-12-31 | 2001-01-15 | 김영환 | 반도체장치의 테스트 패턴 |
| KR20000056067A (ko) | 1999-02-12 | 2000-09-15 | 윤종용 | 플라즈마 데미지 모니터를 위한 반도체 소자의 안테나 패턴형성방법 |
| JP3333155B2 (ja) | 1999-10-14 | 2002-10-07 | 株式会社半導体先端テクノロジーズ | プラズマダメージ評価用tegパターンおよびそれを用いた評価方法 |
| TW473977B (en) * | 2000-10-27 | 2002-01-21 | Vanguard Int Semiconduct Corp | Low-voltage triggering electrostatic discharge protection device and the associated circuit |
| JP2002217258A (ja) * | 2001-01-22 | 2002-08-02 | Hitachi Ltd | 半導体装置およびその測定方法、ならびに半導体装置の製造方法 |
| JP2003100899A (ja) | 2001-09-27 | 2003-04-04 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| KR20050023719A (ko) * | 2003-09-02 | 2005-03-10 | 매그나칩 반도체 유한회사 | 반도체 소자 및 그 제조방법 |
| JP4510034B2 (ja) * | 2007-01-22 | 2010-07-21 | パナソニック株式会社 | 半導体装置の特性評価方法 |
| JP4570662B2 (ja) | 2008-01-16 | 2010-10-27 | Okiセミコンダクタ株式会社 | デジタル・アナログ変換器 |
-
2007
- 2007-07-18 KR KR1020070071708A patent/KR101330084B1/ko not_active Expired - Fee Related
-
2008
- 2008-07-18 JP JP2008187486A patent/JP5379418B2/ja not_active Expired - Fee Related
- 2008-07-18 US US12/175,492 patent/US7851864B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7851864B2 (en) | 2010-12-14 |
| US20090020755A1 (en) | 2009-01-22 |
| KR101330084B1 (ko) | 2013-11-18 |
| JP2009027169A (ja) | 2009-02-05 |
| KR20090008626A (ko) | 2009-01-22 |
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